From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Fri, 12 Jul 2013 06:40:02 +0200
Subject: [U-Boot] [PATCH] mx28evk: Convert to phylib framework
In-Reply-To: <1373603284-884-1-git-send-email-festevam@gmail.com>
References: <1373603284-884-1-git-send-email-festevam@gmail.com>
Message-ID: <201307120640.02896.marex@denx.de>
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To: u-boot@lists.denx.de

Dear Fabio Estevam,

> From: Fabio Estevam <fabio.estevam@freescale.com>
> 
> mx28evk has a LAN8270 ethernet phy and we can use the phylib framework.
> 
> One of the advantages of converting to phylib is that we no longer see a
> timeout prior to the first transfer in the 'tftp' command.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> After applying this patch I get:
> 
> U-Boot 2013.04-11810-gd6d75ec-dirty (Jul 12 2013 - 01:15:03)
> 
> CPU:   Freescale i.MX28 rev1.2 at 454 MHz
> BOOT:  SSP SD/MMC #0, 3V3
> DRAM:  128 MiB
> MMC:   MXS MMC: 0
> Video: MXSFB: 'videomode' variable not set!
> In:    serial
> Out:   serial
> Err:   serial
> Net:   Phy not found
> 
> I still get this 'Phy not found' message, but I think this is not related
> to the board code.

This is because PHYlib doesn't know your PHY. You might need to add a definition 
for it into drivers/net/phy/smsc.c

>  board/freescale/mx28evk/mx28evk.c | 15 +--------------
>  include/configs/mx28evk.h         |  3 ++-
>  2 files changed, 3 insertions(+), 15 deletions(-)
> 
> diff --git a/board/freescale/mx28evk/mx28evk.c
> b/board/freescale/mx28evk/mx28evk.c index 4edd9f4..cd81d58 100644
> --- a/board/freescale/mx28evk/mx28evk.c
> +++ b/board/freescale/mx28evk/mx28evk.c
> @@ -110,7 +110,6 @@ int board_eth_init(bd_t *bis)
>  {
>  	struct mxs_clkctrl_regs *clkctrl_regs =
>  		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
> -	struct eth_device *dev;
>  	int ret;
> 
>  	ret = cpu_eth_init(bis);
> @@ -133,24 +132,12 @@ int board_eth_init(bd_t *bis)
>  		return ret;
>  	}
> 
> -	ret = fecmxc_initialize_multi(bis, 1, 3, MXS_ENET1_BASE);
> +	ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);

Are you sure the PHY address on the MII bus for FEC1 is 0x01 ?

[..]

Best regards,
Marek Vasut