On Mon, Jul 22, 2013 at 11:24:52AM +0200, Philipp Zabel wrote:
> In case the hardware interrupt mask register does not prevent the chip level
> irq from being asserted by the corresponding interrupt status bit, stray
> masked interrupts should to be acknowledged, too.

> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> ---
> I have seen GPI interrupts trigger on DA9063 trigger after being masked during
> initialization, and once the status bits are set, the interrupt handler routine
> never clears them, which keeps the chip irq line asserted forever.

This can't be the standard behaviour since it breaks expectations as to
what happens for masked interrupts.  Though based on your description of
the problem it sounds like a quirk to ack interrupts immediately after
masking them might do the trick instead of the full on always ack
behaviour.