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From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 11/35] drm/i915: Add SNB/IVB support to intel_read_wm_latency
Date: Mon, 5 Aug 2013 07:23:43 +0200	[thread overview]
Message-ID: <20130805052343.GF22035@phenom.ffwll.local> (raw)
In-Reply-To: <CA+gsUGTz+r5MphmMztsVdG15S_z+gH096Am9pbjkzyX5dcuhtQ@mail.gmail.com>

On Tue, Jul 30, 2013 at 06:01:57PM -0300, Paulo Zanoni wrote:
> 2013/7/5  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > SNB and IVB have slightly a different way to read out the
> > watermark latency values.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index a2ca018..6ff89c6 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -2350,6 +2350,13 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[5])
> >                 wm[2] = (sskpd >> 12) & 0xFF;
> >                 wm[3] = (sskpd >> 20) & 0x1FF;
> >                 wm[4] = (sskpd >> 32) & 0x1FF;
> > +       } else if (INTEL_INFO(dev)->gen >= 6) {
> > +               uint32_t sskpd = I915_READ(MCH_SSKPD);
> > +
> > +               wm[0] = (sskpd >> SSKPD_WM0_SHIFT) & SSKPD_WM_MASK;
> > +               wm[1] = (sskpd >> SSKPD_WM1_SHIFT) & SSKPD_WM_MASK;
> > +               wm[2] = (sskpd >> SSKPD_WM2_SHIFT) & SSKPD_WM_MASK;
> > +               wm[3] = (sskpd >> SSKPD_WM3_SHIFT) & SSKPD_WM_MASK;
> 
> My documentation is limited, but this seems at least consistent with
> our current definitions.
> 
> I'd also vote to transform this into a "switch (INTEL_INFO(dev))" and
> add a WARN in case Gen is not 6 or 7.

I guess we can do that once all the stuff here (and maybe 1-2 new
generations) have landed.
> 
> Anyway, the patch looks correct: Reviewed-by: Paulo Zanoni
> <paulo.r.zanoni@intel.com>

Ok, I've pulled in all the patches Paulo has already reviewed and deemed
good. I guess to continue we need to dig out the ilk docs for Paulo ;-)

Thanks for the patches&review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2013-08-05  5:23 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-07-05  8:57 [PATCH 00/35] drm/i915: ILK+ watermark rewrite ville.syrjala
2013-07-05  8:57 ` [PATCH 01/35] drm/i915: Add scaled paramater to update_sprite_watermarks() ville.syrjala
2013-07-30 18:26   ` Paulo Zanoni
2013-07-30 18:30     ` Ville Syrjälä
2013-07-30 18:49       ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 02/35] drm/i915: Pass the actual sprite width to watermarks functions ville.syrjala
2013-07-30 18:32   ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 03/35] drm/i915: Calculate the sprite WM based on the source width instead of the destination width ville.syrjala
2013-07-30 19:01   ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 04/35] drm/i915: Rename hsw_wm_get_pixel_rate to ilk_pipe_pixel_rate ville.syrjala
2013-07-30 19:20   ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 05/35] drm/i915: Rename most wm compute functions to ilk_ prefix ville.syrjala
2013-07-30 19:37   ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 06/35] drm/i915: Pass the watermark level to primary WM compute functions ville.syrjala
2013-07-30 19:49   ` Paulo Zanoni
2013-08-01  8:01     ` Ville Syrjälä
2013-07-05  8:57 ` [PATCH 07/35] drm/i915: Don't pass "mem_value" to ilk_compute_fbc_wm ville.syrjala
2013-07-30 19:54   ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 08/35] drm/i915: Change the watermark latency type to uint16_t ville.syrjala
2013-07-30 20:01   ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 09/35] drm/i915: Split out reading of HSW watermark latency values ville.syrjala
2013-07-05  9:19   ` Chris Wilson
2013-07-05 10:51     ` Ville Syrjälä
2013-07-30 20:09   ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 10/35] drm/i915: Don't multiply the watermark latency values too early ville.syrjala
2013-07-30 20:21   ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 11/35] drm/i915: Add SNB/IVB support to intel_read_wm_latency ville.syrjala
2013-07-30 21:01   ` Paulo Zanoni
2013-08-05  5:23     ` Daniel Vetter [this message]
2013-07-05  8:57 ` [PATCH 12/35] drm/i915: Add ILK " ville.syrjala
2013-07-05  8:57 ` [PATCH 13/35] drm/i915: Store the watermark latency values in dev_priv ville.syrjala
     [not found]   ` <CA+gsUGQ0JqEZiEUsONJh7nr6rPYRfTxJM79oc5tGcexEudB2Og@mail.gmail.com>
2013-07-30 21:42     ` Paulo Zanoni
2013-07-31  9:43       ` Ville Syrjälä
2013-07-05  8:57 ` [PATCH 14/35] drm/i915: Use the stored cursor and plane latencies properly ville.syrjala
2013-07-05  8:57 ` [PATCH 15/35] drm/i915: Print the watermark latencies during init ville.syrjala
2013-07-30 21:49   ` Paulo Zanoni
2013-07-31  9:47     ` Ville Syrjälä
2013-07-05  8:57 ` [PATCH 16/35] drm/i915: Disable specific watermark levels when latency is zero ville.syrjala
2013-07-30 21:51   ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 17/35] drm/i915: Pull watermark level validity check out ville.syrjala
2013-07-05  8:57 ` [PATCH 18/35] drm/i915: Split watermark level computation from the code ville.syrjala
2013-07-05  8:57 ` [PATCH 19/35] drm/i915: Kill fbc_enable from hsw_lp_wm_results ville.syrjala
2013-07-05  8:57 ` [PATCH 20/35] drm/i915: Rename hsw_data_buf_partitioning to intel_ddb_partitioning ville.syrjala
2013-07-05  8:57 ` [PATCH 21/35] drm/i915: Rename hsw_lp_wm_result to intel_wm_level ville.syrjala
2013-07-05  8:57 ` [PATCH 22/35] drm/i915: Calculate max watermark levels for ILK+ ville.syrjala
2013-07-05  8:57 ` [PATCH 23/35] drm/i915; Pull some watermarks state into a separate structure ville.syrjala
2013-07-05  8:57 ` [PATCH 24/35] drm/i915: Split plane watermark parameters into a separate struct ville.syrjala
2013-07-05  8:57 ` [PATCH 25/35] drm/i915: Pass crtc to our update/disable_plane hooks ville.syrjala
2013-07-05  8:57 ` [PATCH 26/35] drm/i915: Don't try to disable plane if it's already disabled ville.syrjala
2013-07-05  8:57 ` [PATCH 27/35] drm/i915: Pass plane and crtc to intel_update_sprite_watermarks ville.syrjala
2013-07-05  8:57 ` [PATCH 28/35] drm/i915: Always call intel_update_sprite_watermarks() when disabling a plane ville.syrjala
2013-07-05  8:57 ` [PATCH 29/35] drm/i915: Pass crtc to intel_update_watermarks() and call it in one place during modeset ville.syrjala
2013-07-05  9:32   ` Chris Wilson
2013-07-05  8:57 ` [PATCH 30/35] drm/i915: Replace the ILK/SNB/IVB/HSW watermark code ville.syrjala
2013-07-05  9:37   ` Chris Wilson
2013-07-05 10:49     ` Ville Syrjälä
2013-07-05 17:46       ` Paulo Zanoni
2013-07-05 18:00         ` Ville Syrjälä
2013-07-05 17:51   ` Paulo Zanoni
2013-07-05 18:11     ` Ville Syrjälä
2013-07-05  8:57 ` [PATCH 31/35] drm/i915: Move HSW linetime watermark handling to modeset code ville.syrjala
2013-07-05 17:44   ` Paulo Zanoni
2013-07-05  8:57 ` [PATCH 32/35] hack: Add debug prints to watermark compute funcs ville.syrjala
2013-07-05  8:57 ` [PATCH 33/35] hack: Don't disable underrun reporting on the first error on ILK/SNB/IVB ville.syrjala
2013-07-05 17:19   ` Paulo Zanoni
2013-07-05 17:34     ` Ville Syrjälä
2013-07-05  8:57 ` [PATCH 34/35] hack: Make fifo underruns DRM_ERROR ville.syrjala
2013-07-05 17:19   ` Paulo Zanoni
2013-07-05 17:39     ` Ville Syrjälä
2013-07-05  8:57 ` [PATCH 35/35] hack: Print watermark programming duration ville.syrjala
2013-07-05 16:54 ` [PATCH 00/35] drm/i915: ILK+ watermark rewrite Paulo Zanoni
2013-07-05 17:22   ` Ville Syrjälä
2013-07-05 17:41     ` Paulo Zanoni
2013-07-05 17:54       ` Ville Syrjälä

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