From: Andi Kleen <andi@firstfloor.org>
To: Ingo Molnar <mingo@kernel.org>
Cc: Andi Kleen <andi@firstfloor.org>,
peterz@infradead.org, linux-kernel@vger.kernel.org,
acme@infradead.org, jolsa@redhat.com, eranian@google.com
Subject: Re: perf, x86: Add parts of the remaining haswell PMU functionality
Date: Thu, 5 Sep 2013 21:33:15 +0200 [thread overview]
Message-ID: <20130905193315.GR19750@two.firstfloor.org> (raw)
In-Reply-To: <20130905170457.GA27741@gmail.com>
> Well, at least the front-end side is still documented in the SDM as being
> usable to count stalled cycles.
Stalled frontend cycles does not necessarily mean frontend bound.
The real bottleneck can be still somewhere later in the PipeLine.
Out of Order CPUs are complex.
>
> AFAICS backend stall cycles are documented to work on Ivy Bridge.
I'm not aware of any documentation that presents these events
as accurate frontend/backend stalls without using the full
TopDown methology (Optimization manual B.3.2)
The level 1 top down method for IvyBridge and Haswell is:
PipelineWidth = 4
Slots = PipelineWidth*CPU_CLK_UNHALTED
FrontendBound = IDQ_UOPS_NOT_DELIVERED.CORE / Slots
BadSpeculation = (UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS +
Width*INT_MISC.RECOVERY_CYCLES) / Slots
Retiring = UOPS_RETIRED.RETIRE_SLOTS / Slots
BackendBound = FrontendBound - BadSpeculation + Retiring
> For perf stat -a alike system-wide workloads it should still produce
> usable results that way.
For some classes of workloads it will be a large unpredictable
systematic error.
> I.e. something like the patch below (it does not solve the double counting
> yet).
Well you can add it, but I'm not going to Ack it.
-Andi
next prev parent reply other threads:[~2013-09-05 19:33 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-09 1:15 perf, x86: Add parts of the remaining haswell PMU functionality Andi Kleen
2013-08-09 1:15 ` [PATCH 1/4] perf, x86: Avoid checkpointed counters causing excessive TSX aborts v4 Andi Kleen
2013-08-13 10:29 ` Peter Zijlstra
2013-08-09 1:15 ` [PATCH 2/4] perf, x86: Report TSX transaction abort cost as weight Andi Kleen
2013-08-13 11:23 ` Peter Zijlstra
2013-08-13 14:35 ` Andi Kleen
2013-08-13 15:27 ` Peter Zijlstra
2013-08-13 18:25 ` Andi Kleen
2013-08-14 9:33 ` Peter Zijlstra
2013-08-09 1:15 ` [PATCH 3/4] perf, x86: Add Haswell TSX event aliases v6 Andi Kleen
2013-08-09 1:15 ` [PATCH 4/4] perf, tools: Add perf stat --transaction v3 Andi Kleen
2013-09-02 6:55 ` perf, x86: Add parts of the remaining haswell PMU functionality Ingo Molnar
2013-09-05 13:15 ` Ingo Molnar
2013-09-05 15:10 ` Andi Kleen
2013-09-05 17:04 ` Ingo Molnar
2013-09-05 19:33 ` Andi Kleen [this message]
2013-09-05 17:12 ` Ingo Molnar
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