From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH v3] drm/i915: Fix VGA handling using stop_machine() or mmio Date: Mon, 7 Oct 2013 10:44:14 +0100 Message-ID: <20131007094414.GC4939@nuc-i3427.alporthouse.com> References: <20130930142437.GI744@nuc-i3427.alporthouse.com> <1380721375-32495-1-git-send-email-ville.syrjala@linux.intel.com> <20131007091516.GB4939@nuc-i3427.alporthouse.com> <20131007092503.GF9395@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from relay.fireflyinternet.com (relay1.fireflyinternet.com [217.160.24.105]) by gabe.freedesktop.org (Postfix) with ESMTP id 6CE57E72AA for ; Mon, 7 Oct 2013 03:19:01 -0700 (PDT) Received: from fireflyinternet.com (unverified [87.106.93.118]) by relay.fireflyinternet.com (Firefly Internet (R2)) with ESMTP id 53652-2000100 for ; Mon, 07 Oct 2013 10:44:24 +0100 Content-Disposition: inline In-Reply-To: <20131007092503.GF9395@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Cc: Dave Airlie , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Oct 07, 2013 at 12:25:03PM +0300, Ville Syrj=E4l=E4 wrote: > On Mon, Oct 07, 2013 at 10:15:16AM +0100, Chris Wilson wrote: > > On Wed, Oct 02, 2013 at 04:42:55PM +0300, ville.syrjala@linux.intel.com= wrote: > > > From: Ville Syrj=E4l=E4 > > > = > > > We have several problems with out VGA handling: > > > - We try to use the GMCH control VGA disable bit even though it may > > > be locked > > > - If we manage to disable VGA throuh GMCH control, we're no longer > > > able to correctly disable the VGA plane > > > - Taking part in the VGA arbitration is too expensive for X [1] > > > = > > > So let's treat the GMCH control VGA disable bit as read-only and leave > > > it for the BIOS to set, as it was intended. To disable VGA we will use > > > the VGA misc register, and to disable VGA IO we will disable IO space > > > completely via the PCI command register. > > > = > > > But we still need VGA register access during resume (and possibly dur= ing > > > lid event on insane BIOSen) to disable the VGA plane. Also we need to > > > re-disable VGA memory decode via the VGA misc register on resume. > > > = > > > Luckily up to gen4, VGA registers can be accessed through MMIO. > > > Unfortunately from gen5 onwards only the legacy VGA IO port range > > > works. So on gen5+ we still need IO space to be enabled during those > > > few special moments when we need to access VGA registers. > > > = > > > We still want to opt out of VGA arbitration on gen5+, so we have keep > > > IO space disabled most of the time. And when we do need to poke at VGA > > > registers, we enable IO space briefly while no one is looking. To > > > guarantee that no one is looking we will use stop_machine(). > > > = > > > [1] http://lists.x.org/archives/xorg-devel/2013-September/037763.html > > > = > > > v2: Use SNB_GMCH_TRL on SNB+ > > > Use port IO instead of MMIO on CTG/ELK > > > Add WaEnableVGAAccessThroughIOPort comment > > > Fix the max number of devices on the bus limit > > > v3: Allocate the temp space dynamically > > > Print some errors if we fail to execute the vga "op" due to alloc= failure > > = > > Passes the dGPU test, the SNB laptop, but is doa for CTG. > = > Crap. And v2 still works all right there? No, appears I mislead you. The last one to successfully work was the composite v1 patch set. Sorry. -Chris -- = Chris Wilson, Intel Open Source Technology Centre