From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PULL] drm-intel-fixes Date: Mon, 28 Oct 2013 08:49:45 +0100 Message-ID: <20131028074945.GM18189@phenom.ffwll.local> References: Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ea0-f175.google.com (mail-ea0-f175.google.com [209.85.215.175]) by gabe.freedesktop.org (Postfix) with ESMTP id 0591CE6260 for ; Mon, 28 Oct 2013 00:49:19 -0700 (PDT) Received: by mail-ea0-f175.google.com with SMTP id l15so1574160eak.34 for ; Mon, 28 Oct 2013 00:49:17 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: Dave Airlie Cc: Intel Graphics Development , DRI Development List-Id: dri-devel@lists.freedesktop.org Hi Dave, Please do _not_ pull this. The pipe bpp readout stuff this crucially relies on is only partially backported from -next to -fixes and apparently missing bits on Haswell. Thanks, Daniel On Fri, Oct 25, 2013 at 12:50:12PM +0200, Daniel Vetter wrote: > Hi Dave, > = > Just the edp bpp fix from Jani plus the pipe bpp readout code from Ville > to make it work. There's a 3 pipe ivb regression fix pending from me, but > Ville's review convinced me that my first stab is broken. > = > Cheers, Daniel > = > = > The following changes since commit 828c79087cec61eaf4c76bb32c222fbe35ac39= 30: > = > drm/i915: Disable GGTT PTEs on GEN6+ suspend (2013-10-18 15:44:47 +0200) > = > are available in the git repository at: > = > git://people.freedesktop.org/~danvet/drm-intel tags/drm-intel-fixes-201= 3-10-25 > = > for you to fetch changes up to 52e1e223456e3aa747e9932f95948381f04b3b26: > = > drm/i915/dp: workaround BIOS eDP bpp clamping issue (2013-10-21 > 09:57:02 +0200) > = > ---------------------------------------------------------------- > Jani Nikula (1): > drm/i915/dp: workaround BIOS eDP bpp clamping issue > = > Ville Syrj=E4l=E4 (1): > drm/i915: Add support for pipe_bpp readout > = > drivers/gpu/drm/i915/intel_ddi.c | 17 +++++++++++++++++ > drivers/gpu/drm/i915/intel_display.c | 36 ++++++++++++++++++++++++++++++= ++++++ > drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++++++++++++ > 3 files changed, 73 insertions(+) > = > -- = > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch