From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754778Ab3KAQSe (ORCPT ); Fri, 1 Nov 2013 12:18:34 -0400 Received: from merlin.infradead.org ([205.233.59.134]:54666 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752808Ab3KAQSd (ORCPT ); Fri, 1 Nov 2013 12:18:33 -0400 Date: Fri, 1 Nov 2013 17:18:19 +0100 From: Peter Zijlstra To: "Paul E. McKenney" Cc: Victor Kaplansky , Oleg Nesterov , Anton Blanchard , Benjamin Herrenschmidt , Frederic Weisbecker , LKML , Linux PPC dev , Mathieu Desnoyers , Michael Ellerman , Michael Neuling Subject: Re: perf events ring buffer memory barrier on powerpc Message-ID: <20131101161819.GV16117@laptop.programming.kicks-ass.net> References: <20131025173749.GG19466@laptop.lan> <20131028132634.GO19466@laptop.lan> <20131028163418.GD4126@linux.vnet.ibm.com> <20131028201735.GA15629@redhat.com> <20131030092725.GL4126@linux.vnet.ibm.com> <20131030112526.GI16117@laptop.programming.kicks-ass.net> <20131031064015.GV4126@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20131031064015.GV4126@linux.vnet.ibm.com> User-Agent: Mutt/1.5.21 (2012-12-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: > The dependency you are talking about is via the "if" statement? > Even C/C++11 is not required to respect control dependencies. > > This one is a bit annoying. The x86 TSO means that you really only > need barrier(), ARM (recent ARM, anyway) and Power could use a weaker > barrier, and so on -- but smp_mb() emits a full barrier. > > Perhaps a new smp_tmb() for TSO semantics, where reads are ordered > before reads, writes before writes, and reads before writes, but not > writes before reads? Another approach would be to define a per-arch > barrier for this particular case. Supposing a sane language where we can rely on control flow; would that change the story? I'm afraid I'm now terminally confused between actual proper memory model issues and fucked compilers. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from merlin.infradead.org (unknown [IPv6:2001:4978:20e::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D750A2C0090 for ; Sat, 2 Nov 2013 03:18:30 +1100 (EST) Date: Fri, 1 Nov 2013 17:18:19 +0100 From: Peter Zijlstra To: "Paul E. McKenney" Subject: Re: perf events ring buffer memory barrier on powerpc Message-ID: <20131101161819.GV16117@laptop.programming.kicks-ass.net> References: <20131025173749.GG19466@laptop.lan> <20131028132634.GO19466@laptop.lan> <20131028163418.GD4126@linux.vnet.ibm.com> <20131028201735.GA15629@redhat.com> <20131030092725.GL4126@linux.vnet.ibm.com> <20131030112526.GI16117@laptop.programming.kicks-ass.net> <20131031064015.GV4126@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <20131031064015.GV4126@linux.vnet.ibm.com> Cc: Michael Neuling , Mathieu Desnoyers , Oleg Nesterov , LKML , Linux PPC dev , Anton Blanchard , Frederic Weisbecker , Victor Kaplansky List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: > The dependency you are talking about is via the "if" statement? > Even C/C++11 is not required to respect control dependencies. > > This one is a bit annoying. The x86 TSO means that you really only > need barrier(), ARM (recent ARM, anyway) and Power could use a weaker > barrier, and so on -- but smp_mb() emits a full barrier. > > Perhaps a new smp_tmb() for TSO semantics, where reads are ordered > before reads, writes before writes, and reads before writes, but not > writes before reads? Another approach would be to define a per-arch > barrier for this particular case. Supposing a sane language where we can rely on control flow; would that change the story? I'm afraid I'm now terminally confused between actual proper memory model issues and fucked compilers.