From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PULL] drm-intel-fixes Date: Mon, 2 Dec 2013 08:57:47 +0100 Message-ID: <20131202075735.GA6768@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ea0-f180.google.com (mail-ea0-f180.google.com [209.85.215.180]) by gabe.freedesktop.org (Postfix) with ESMTP id 770D8FA8A1 for ; Sun, 1 Dec 2013 23:57:08 -0800 (PST) Received: by mail-ea0-f180.google.com with SMTP id f15so8488288eak.25 for ; Sun, 01 Dec 2013 23:57:06 -0800 (PST) Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org To: Dave Airlie Cc: Intel Graphics Development , DRI Development List-Id: dri-devel@lists.freedesktop.org Hi Dave, Just flushing out my pile of bugfixes, most of them for regressions/cc: stable. Nothing really serious going on. For outstanding issues we still have the S4 fun due to the hsw S4 duct-tape pending (seems like I need to switch into angry maintainer mode on that one). And there's the mode merging revert to make my g33 work again still pending for drm core. For that one I don't have any more clue (and it looks like no one else has a good idea either). And apparently the locking WARN fix in here also needs to be replicated for boot, still confirming that one though. Cheers, Daniel The following changes since commit f727b490efd0941a8d720fd07012dcb7f0740f77: drm/i915: Fix gen3 self-refresh watermarks (2013-11-20 15:52:52 +0100) are available in the git repository at: git://people.freedesktop.org/~danvet/drm-intel tags/drm-intel-fixes-2013-= 12-02 for you to fetch changes up to 993fc6ebaf4af6fdfde08cc8649c386e483a5908: drm/i915: Pin pages whilst allocating for dma-buf vmap() (2013-11-29 15:5= 1:20 +0100) ---------------------------------------------------------------- Chris Wilson (3): drm/i915: Prefer setting PTE cache age to 3 drm/i915: Pin relocations for the duration of constructing the execbu= ffer drm/i915: Pin pages whilst allocating for dma-buf vmap() Jani Nikula (1): drm/i915/ddi: set sink to power down mode on dp disable Jesse Barnes (2): drm/i915: take mode config lock around crtc disable at suspend drm/i915: use crtc_htotal in watermark calculations to match fastboot= v2 Paulo Zanoni (1): drm/i915: use the correct force_wake function at the PC8 code Ville Syrj=E4l=E4 (5): drm/i915: Check VBT for eDP ports on VLV drm/i915: Simplify DP vs. eDP detection drm/i915: Fix pipe CSC post offset calculation drm/i915: Make the DERRMR SRM target global GTT drm/i915: MI_PREDICATE_RESULT_2 is HSW only drivers/gpu/drm/i915/i915_drv.c | 2 + drivers/gpu/drm/i915/i915_gem.c | 7 ++-- drivers/gpu/drm/i915/i915_gem_dmabuf.c | 13 ++++--- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 60 ++++++++++++++++----------= ---- drivers/gpu/drm/i915/i915_gem_gtt.c | 6 ++- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ddi.c | 5 ++- drivers/gpu/drm/i915/intel_display.c | 14 +++---- drivers/gpu/drm/i915/intel_dp.c | 34 +++++++---------- drivers/gpu/drm/i915/intel_drv.h | 2 +- drivers/gpu/drm/i915/intel_pm.c | 15 ++++---- 11 files changed, 82 insertions(+), 77 deletions(-) -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch