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Date: Wed, 29 Jan 2014 18:53:34 +0530
From: Jenny Tc <jenny.tc@intel.com>
To: Pavel Machek <pavel@ucw.cz>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>,
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Subject: Re: [PATCH 4/4] power_supply: bq24261 charger driver
Message-ID: <20140129132334.GB15355@jenny-desktop>
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On Tue, Jan 28, 2014 at 07:14:45AM -0700, Pavel Machek wrote:
> > +#define BQ24261_ICHRG_MASK		(0x1F << 3)
> > +#define BQ24261_ICHRG_100ma		(0x01 << 3)
> > +#define BQ24261_ICHRG_200ma		(0x01 << 4)
> > +#define BQ24261_ICHRG_400ma		(0x01 << 5)
> > +#define BQ24261_ICHRG_800ma		(0x01 << 6)
> > +#define BQ24261_ICHRG_1600ma		(0x01 << 7)
> 
> First, its mA, not ma.

Camel Case allowed? Ignore Checkpatch.pl warning?
> > +u16 bq24261_iterm[][2] = {
> > +	{0, 0x00}
> > +	,
> > +	{50, BQ24261_ITERM_50ma}
> > +	,
> > +	{100, BQ24261_ITERM_100ma}
> > +	,
> > +	{150, BQ24261_ITERM_100ma | BQ24261_ITERM_50ma}
> 
> ...this is very obscure way to do with table what can be done with
> 
> (x/50) << 3, right ?

Few register settings need table mapping, but some can have logic as your
comment say. Just wanted to keep same logic for all register settings.
Doesn't it make more readable?

> > +u16 bq24261_cc[][2] = {
> > +
> > +	{500, 0x00}
> > +	,
> > +	{600, BQ24261_ICHRG_100ma}
> > +	,
> > +	{700, BQ24261_ICHRG_200ma}
> > +	,
> > +	{800, BQ24261_ICHRG_100ma | BQ24261_ICHRG_200ma}
> > +	,
> > +	{900, BQ24261_ICHRG_400ma}
> 
> I suspect you can get rid of this, too, if you expand macros.
Same as above comment.

-Jenny