From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: [PATCH 22/48] drm/i915: Use drm_mm for PPGTT PDEs Date: Mon, 24 Mar 2014 13:02:57 -0700 Message-ID: <20140324200256.GH27066@bwidawsk.net> References: <20131206215521.GA6922@bwidawsk.net> <1386367941-7131-1-git-send-email-benjamin.widawsky@intel.com> <1386367941-7131-70-git-send-email-benjamin.widawsky@intel.com> <20140320111013.GR4890@nuc-i3427.alporthouse.com> <20140324193623.GD27066@bwidawsk.net> <20140324194556.GA26050@nuc-i3427.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail.bwidawsk.net (bwidawsk.net [166.78.191.112]) by gabe.freedesktop.org (Postfix) with ESMTP id 2DDAD89BA3 for ; Mon, 24 Mar 2014 13:03:17 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140324194556.GA26050@nuc-i3427.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson , Ben Widawsky , Intel GFX , Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org On Mon, Mar 24, 2014 at 07:45:56PM +0000, Chris Wilson wrote: > On Mon, Mar 24, 2014 at 12:36:23PM -0700, Ben Widawsky wrote: > > On Thu, Mar 20, 2014 at 11:10:13AM +0000, Chris Wilson wrote: > > > On Fri, Dec 06, 2013 at 02:11:55PM -0800, Ben Widawsky wrote: > > > > static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt) > > > > { > > > > +#define GEN6_PD_ALIGN (PAGE_SIZE * 16) > > > > +#define GEN6_PD_SIZE (GEN6_PPGTT_PD_ENTRIES * PAGE_SIZE) > > > > struct drm_device *dev = ppgtt->base.dev; > > > > struct drm_i915_private *dev_priv = dev->dev_private; > > > > - unsigned first_pd_entry_in_global_pt; > > > > - int i; > > > > - int ret = -ENOMEM; > > > > + int i, ret; > > > > > > > > - /* ppgtt PDEs reside in the global gtt pagetable, which has 512*1024 > > > > - * entries. For aliasing ppgtt support we just steal them at the end for > > > > - * now. */ > > > > - first_pd_entry_in_global_pt = gtt_total_entries(dev_priv->gtt); > > > > + /* PPGTT PDEs reside in the GGTT and consists of 512 entries. The > > > > + * allocator works in address space sizes, so it's multiplied by page > > > > + * size. We allocate at the top of the GTT to avoid fragmentation. > > > > + */ > > > > + BUG_ON(!drm_mm_initialized(&dev_priv->gtt.base.mm)); > > > > + ret = drm_mm_insert_node_in_range_generic(&dev_priv->gtt.base.mm, > > > > + &ppgtt->node, GEN6_PD_SIZE, > > > > + GEN6_PD_ALIGN, 0, > > > > + 0, dev_priv->gtt.base.total, > > > > + DRM_MM_SEARCH_DEFAULT); > > > This could use the simpler drm_mm_insert_node_generic(). > > > -Chris > > > > > > > Not with my [simple] workaround to not use offset 0, which Daniel > > reverted. I think he has some hope that we'll actually be able to figure > > out why we can't use offset 0 instead of just using the workaround. > > You can simply reduce the drm_mm range... > -Chris > Yeah, that's a better solution. Patches welcome? > -- > Chris Wilson, Intel Open Source Technology Centre > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ben Widawsky, Intel Open Source Technology Center