From mboxrd@z Thu Jan  1 00:00:00 1970
From: Lukasz Majewski <l.majewski@samsung.com>
Date: Thu, 27 Mar 2014 18:25:49 +0100
Subject: [U-Boot] [PATCH 09/10] exynos: Enable the LCD backlight for snow
In-Reply-To: <1395856590-21917-10-git-send-email-sjg@chromium.org>
References: <1395856590-21917-1-git-send-email-sjg@chromium.org>
	<1395856590-21917-10-git-send-email-sjg@chromium.org>
Message-ID: <20140327182549.5fe0505f@amdc2363>
List-Id: <u-boot.lists.denx.de>
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To: u-boot@lists.denx.de

Hi Simon,

> The backlight uses FETs on the TPS65090. Enable this so that the
> display is visible.
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
>  board/samsung/smdk5250/exynos5-dt.c | 90
> +++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+)
> 
> diff --git a/board/samsung/smdk5250/exynos5-dt.c
> b/board/samsung/smdk5250/exynos5-dt.c index c83b034..a0ae641 100644
> --- a/board/samsung/smdk5250/exynos5-dt.c
> +++ b/board/samsung/smdk5250/exynos5-dt.c
> @@ -20,6 +20,7 @@
>  #include <asm/arch/sromc.h>
>  #include <power/pmic.h>
>  #include <power/max77686_pmic.h>
> +#include <power/tps65090_pmic.h>
>  #include <tmu.h>
>  
>  DECLARE_GLOBAL_DATA_PTR;
> @@ -60,6 +61,52 @@ int checkboard(void)
>  #endif
>  
>  #ifdef CONFIG_LCD
> +static int board_dp_bridge_setup(void)
> +{
> +	struct exynos5_gpio_part1 *gpio1 =
> +		(struct exynos5_gpio_part1
> *)samsung_get_base_gpio_part1();
> +	const int MAX_TRIES = 10;
> +	int num_tries;
> +
> +	debug("%s\n", __func__);
> +
> +	/* Setup the GPIOs */
> +
> +	/* PD is ACTIVE_LOW, and initially de-asserted */
> +	s5p_gpio_set_pull(&gpio1->y2, 5, GPIO_PULL_NONE);
> +	s5p_gpio_direction_output(&gpio1->y2, 5, 1);
> +
> +	/* Reset is ACTIVE_LOW */
> +	s5p_gpio_set_pull(&gpio1->x1, 5, GPIO_PULL_NONE);
> +	s5p_gpio_direction_output(&gpio1->x1, 5, 0);
> +
> +	udelay(10);
> +	s5p_gpio_set_value(&gpio1->x1, 5, 1);
> +
> +	s5p_gpio_direction_input(&gpio1->x0, 7);
> +
> +	/*
> +	 * We need to wait for 90ms after bringing up the bridge
> since there
> +	 * is a phantom "high" on the HPD chip during its bootup.
> The phantom
> +	 * high comes within 7ms of de-asserting PD and persists for
> at least
> +	 * 15ms.  The real high comes roughly 50ms after PD is
> de-asserted. The
> +	 * phantom high makes it hard for us to know when the NXP
> chip is up.
> +	 */
> +	mdelay(90);
> +
> +	for (num_tries = 0; num_tries < MAX_TRIES; num_tries++) {
> +		/* Check HPD.  If it's high, we're all good. */
> +		if (s5p_gpio_get_value(&gpio1->x0, 7))
> +				return 0;
> +
> +		debug("%s: eDP bridge failed to come up; try %d of
> %d\n",
> +		      __func__, num_tries, MAX_TRIES);
> +	}
> +
> +	/* Immediately go into bridge reset if the hp line is not
> high */
> +	return -ENODEV;
> +}
> +
>  void exynos_cfg_lcd_gpio(void)
>  {
>  	struct exynos5_gpio_part1 *gpio1 =
> @@ -81,4 +128,47 @@ void exynos_set_dp_phy(unsigned int onoff)
>  {
>  	set_dp_phy_ctrl(onoff);
>  }
> +
> +void exynos_backlight_on(unsigned int onoff)
> +{
> +	debug("%s(%u)\n", __func__, onoff);
> +
> +	if (onoff) {
> +#ifdef CONFIG_POWER_TPS65090
> +		struct exynos5_gpio_part1 *gpio1 =
> +			(struct exynos5_gpio_part1 *)
> +
> samsung_get_base_gpio_part1();
> +		int ret;
> +
> +		ret = tps65090_fet_enable(1); /* Enable FET1,
> backlight */
> +		if (ret)
> +			return;
> +
> +		/* T5 in the LCD timing spec (defined as > 10ms) */
> +		mdelay(10);
> +
> +		/* board_dp_backlight_pwm */
> +		s5p_gpio_direction_output(&gpio1->b2, 0, 1);
> +
> +		/* T6 in the LCD timing spec (defined as > 10ms) */
> +		mdelay(10);
> +
> +		/* board_dp_backlight_en */
> +		s5p_gpio_direction_output(&gpio1->x3, 0, 1);
> +#endif
> +	}
> +}
> +
> +void exynos_lcd_power_on(void)
> +{
> +	debug("%s\n", __func__);
> +
> +#ifdef CONFIG_POWER_TPS65090
> +	/* board_dp_lcd_vdd */
> +	tps65090_fet_enable(6); /* Enable FET6, lcd panel */
> +#endif
> +
> +	board_dp_bridge_setup();
> +}
> +
>  #endif

Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>

-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group