From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 1/5] drm/i915: Split the BDW device definition to prepare for dual BSD rings on BDW GT3 Date: Wed, 9 Apr 2014 16:27:15 +0200 Message-ID: <20140409142715.GB9262@phenom.ffwll.local> References: <1397008796-3595-1-git-send-email-yakui.zhao@intel.com> <1397008796-3595-2-git-send-email-yakui.zhao@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f46.google.com (mail-ee0-f46.google.com [74.125.83.46]) by gabe.freedesktop.org (Postfix) with ESMTP id 131706EB6C for ; Wed, 9 Apr 2014 07:27:18 -0700 (PDT) Received: by mail-ee0-f46.google.com with SMTP id t10so1955856eei.33 for ; Wed, 09 Apr 2014 07:27:17 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1397008796-3595-2-git-send-email-yakui.zhao@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Zhao Yakui Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Apr 09, 2014 at 09:59:52AM +0800, Zhao Yakui wrote: > Based on the hardware spec, the BDW GT3 has the different configuration > with the BDW GT1/GT2. So split the BDW device info definition. > This is to do the preparation for adding the Dual BSD rings on BDW GT3 machine. > > Signed-off-by: Zhao Yakui > --- > drivers/gpu/drm/i915/i915_drv.c | 24 +++++++++++++++++++++++- > include/drm/i915_pciids.h | 10 +++++++--- > 2 files changed, 30 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index a01faea..609f837 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -279,6 +279,26 @@ static const struct intel_device_info intel_broadwell_m_info = { > GEN_DEFAULT_PIPEOFFSETS, > }; > > +static const struct intel_device_info intel_broadwell_gt3d_info = { > + .gen = 8, .num_pipes = 3, > + .need_gfx_hws = 1, .has_hotplug = 1, > + .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, > + .has_llc = 1, > + .has_ddi = 1, > + .has_fbc = 1, > + GEN_DEFAULT_PIPEOFFSETS, > +}; > + > +static const struct intel_device_info intel_broadwell_gt3m_info = { > + .gen = 8, .is_mobile = 1, .num_pipes = 3, > + .need_gfx_hws = 1, .has_hotplug = 1, > + .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, > + .has_llc = 1, > + .has_ddi = 1, > + .has_fbc = 1, > + GEN_DEFAULT_PIPEOFFSETS, > +}; > + > /* > * Make sure any device matches here are from most specific to most > * general. For example, since the Quanta match is based on the subsystem > @@ -312,7 +332,9 @@ static const struct intel_device_info intel_broadwell_m_info = { > INTEL_VLV_M_IDS(&intel_valleyview_m_info), \ > INTEL_VLV_D_IDS(&intel_valleyview_d_info), \ > INTEL_BDW_M_IDS(&intel_broadwell_m_info), \ > - INTEL_BDW_D_IDS(&intel_broadwell_d_info) > + INTEL_BDW_D_IDS(&intel_broadwell_d_info), \ > + INTEL_BDW_GT3M_IDS(&intel_broadwell_gt3m_info), \ > + INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info) You've forgotten to update the stolen memory quirk table in the x86 code. Just grep for INTEL_BDW_M_IDS to see all users of these macros. -Daniel > > static const struct pci_device_id pciidlist[] = { /* aka */ > INTEL_PCI_IDS, > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h > index 940ece4..32d75f8 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -225,12 +225,16 @@ > > #define INTEL_BDW_M_IDS(info) \ > _INTEL_BDW_M_IDS(1, info), \ > - _INTEL_BDW_M_IDS(2, info), \ > - _INTEL_BDW_M_IDS(3, info) > + _INTEL_BDW_M_IDS(2, info) > > #define INTEL_BDW_D_IDS(info) \ > _INTEL_BDW_D_IDS(1, info), \ > - _INTEL_BDW_D_IDS(2, info), \ > + _INTEL_BDW_D_IDS(2, info) > + > +#define INTEL_BDW_GT3M_IDS(info) \ > + _INTEL_BDW_M_IDS(3, info) > + > +#define INTEL_BDW_GT3D_IDS(info) \ > _INTEL_BDW_D_IDS(3, info) > > #endif /* _I915_PCIIDS_H */ > -- > 1.7.10.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch