On Mon, Apr 14, 2014 at 02:29:57PM +0800, Barry Song wrote:
> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
> 
> the old code uses wrong marco - SIRFSOC_SPI_FIFO_FULL is not for
> FIFO interrupt status, it is for FIFO status. here in the ISR,
> SIRFSOC_SPI_TXFIFO_EMPTY is the right bit for SPI TXFIFO interrupt
> status.

Applied, thanks.