From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v2 14/25] drm/i915: sanitize enable_rc6 option Date: Wed, 16 Apr 2014 15:28:05 +0300 Message-ID: <20140416122805.GF18465@intel.com> References: <1397496286-29649-1-git-send-email-imre.deak@intel.com> <1397496286-29649-15-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 861DE6E389 for ; Wed, 16 Apr 2014 05:28:26 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1397496286-29649-15-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Imre Deak Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Apr 14, 2014 at 08:24:35PM +0300, Imre Deak wrote: > Atm, an invalid enable_rc6 module option will be silently ignored, so > emit an info message about it. Doing an early sanitization we can also > reuse intel_enable_rc6() in a follow-up patch to see if RC6 is actually > enabled. Currently the caller would have to filter a non-zero return > value based on the platform we are running on. For example on VLV with > i915.enable_rc6 set to 2, RC6 won't be enabled but atm > intel_enable_rc6() would still return 2 in this case. > = > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_pm.c | 27 ++++++++++++++++++++++++--- > 1 file changed, 24 insertions(+), 3 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel= _pm.c > index a56f6b1..89fe0a7 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3262,15 +3262,29 @@ static void intel_print_rc6_info(struct drm_devic= e *dev, u32 mode) > (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" : "off"); > } > = > -int intel_enable_rc6(const struct drm_device *dev) > +static int sanitize_rc6_option(const struct drm_device *dev, int enable_= rc6) > { > /* No RC6 before Ironlake */ > if (INTEL_INFO(dev)->gen < 5) > return 0; > = > /* Respect the kernel parameter if it is set */ > - if (i915.enable_rc6 >=3D 0) > - return i915.enable_rc6; > + if (enable_rc6 >=3D 0) { > + int mask =3D 0; > + > + if (IS_BROADWELL(dev) || IS_HASWELL(dev) || > + IS_VALLEYVIEW(dev) || IS_IRONLAKE_M(dev)) > + mask =3D INTEL_RC6_ENABLE; > + else if (INTEL_INFO(dev)->gen >=3D 6) > + mask =3D INTEL_RC6_ENABLE | INTEL_RC6p_ENABLE | > + INTEL_RC6pp_ENABLE; You forgot ILK. = Also this would seem simpler: if (SNB|IVB) mask =3D rc6 | rc6p | rc6pp; else mask =3D rc6; > + > + if ((enable_rc6 & mask) !=3D enable_rc6) > + DRM_INFO("Adjusting RC6 mask to %d (requested %d, valid %d)\n", > + enable_rc6, enable_rc6 & mask, mask); > + > + return enable_rc6 & mask; > + } > = > /* Disable RC6 on Ironlake */ > if (INTEL_INFO(dev)->gen =3D=3D 5) > @@ -3282,6 +3296,11 @@ int intel_enable_rc6(const struct drm_device *dev) > return INTEL_RC6_ENABLE; > } > = > +int intel_enable_rc6(const struct drm_device *dev) > +{ > + return i915.enable_rc6; > +} > + > static void gen6_enable_rps_interrupts(struct drm_device *dev) > { > struct drm_i915_private *dev_priv =3D dev->dev_private; > @@ -4496,6 +4515,8 @@ static void intel_init_emon(struct drm_device *dev) > = > void intel_init_gt_powersave(struct drm_device *dev) > { > + i915.enable_rc6 =3D sanitize_rc6_option(dev, i915.enable_rc6); > + > if (IS_VALLEYVIEW(dev)) > valleyview_setup_pctx(dev); > } > -- = > 1.8.4 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC