From mboxrd@z Thu Jan 1 00:00:00 1970 From: Huang Shijie Subject: Re: [PATCH v1 2/7] mtd: spi-nor: add DDR quad read support Date: Thu, 24 Apr 2014 12:53:34 +0800 Message-ID: <20140424045332.GB29664@localhost> References: <1398248215-26768-3-git-send-email-b32955@freescale.com> <201404232145.57404.marex@denx.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Return-path: Content-Disposition: inline In-Reply-To: <201404232145.57404.marex@denx.de> Sender: linux-doc-owner@vger.kernel.org To: Marek Vasut Cc: dwmw2@infradead.org, computersforpeace@gmail.com, linux-mtd@lists.infradead.org, linux-doc@vger.kernel.org, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org List-Id: devicetree@vger.kernel.org On Wed, Apr 23, 2014 at 09:45:57PM +0200, Marek Vasut wrote: > On Wednesday, April 23, 2014 at 12:16:50 PM, Huang Shijie wrote: > > This patch adds the DDR quad read support by the following: > > > > [1] add SPI_NOR_DDR_QUAD read mode. > > > > [2] add DDR Quad read opcodes: > > SPINOR_OP_READ_1_4_4_D / SPINOR_OP_READ4_1_4_4_D > > > > [3] add set_ddr_quad_mode() to initialize for the DDR quad read. > > Currently it only works for Spansion NOR. > > > > [3] set the dummy with 8 for DDR quad read. > > The m25p80.c can not support the DDR quad read, the SPI NOR > > controller can set the dummy value in its driver, such as fsl-quadspi.c. > > > > Test this patch for Spansion s25fl128s NOR flash. > > > > Signed-off-by: Huang Shijie > > --- > > drivers/mtd/spi-nor/spi-nor.c | 50 > > +++++++++++++++++++++++++++++++++++++++- include/linux/mtd/spi-nor.h | > > 8 +++++- > > 2 files changed, 54 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > > index 1a12f81..e2f69db 100644 > > --- a/drivers/mtd/spi-nor/spi-nor.c > > +++ b/drivers/mtd/spi-nor/spi-nor.c > > @@ -74,6 +74,15 @@ static int read_cr(struct spi_nor *nor) > > static inline int spi_nor_read_dummy_cycles(struct spi_nor *nor) > > { > > switch (nor->flash_read) { > > + case SPI_NOR_DDR_QUAD: > > + /* > > + * The m25p80.c can not support the DDR quad read. > > + * We set the dummy cycles to 8 by default. If the SPI NOR > > + * controller driver has already set it before call the > > + * spi_nor_scan(), we just keep it as it is. > > + */ > > + if (nor->read_dummy) > > + return nor->read_dummy; > > Can the controller set this variable to zero ? The default value of this variable is zero. It it meaningless to set zero. The DDR Quad read definitely will use a non-zero dummy. > > [...] > > > +static int set_ddr_quad_mode(struct spi_nor *nor, u32 jedec_id) > > +{ > > + int status; > > + > > + switch (JEDEC_MFR(jedec_id)) { > > + case CFI_MFR_AMD: /* Spansion, actually */ > > + status = spansion_quad_enable(nor); > > + if (status) { > > + dev_err(nor->dev, > > + "Spansion DDR quad-read not enabled\n"); > > + return -EINVAL; > > Can't you just return status here as well to propagate the failure? ok. thanks Huang Shijie From mboxrd@z Thu Jan 1 00:00:00 1970 From: Huang Shijie Subject: Re: [PATCH v1 2/7] mtd: spi-nor: add DDR quad read support Date: Thu, 24 Apr 2014 12:53:34 +0800 Message-ID: <20140424045332.GB29664@localhost> References: <1398248215-26768-3-git-send-email-b32955@freescale.com> <201404232145.57404.marex@denx.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Cc: , , , , , , To: Marek Vasut Return-path: Content-Disposition: inline In-Reply-To: <201404232145.57404.marex@denx.de> Sender: linux-doc-owner@vger.kernel.org List-Id: linux-spi.vger.kernel.org On Wed, Apr 23, 2014 at 09:45:57PM +0200, Marek Vasut wrote: > On Wednesday, April 23, 2014 at 12:16:50 PM, Huang Shijie wrote: > > This patch adds the DDR quad read support by the following: > > > > [1] add SPI_NOR_DDR_QUAD read mode. > > > > [2] add DDR Quad read opcodes: > > SPINOR_OP_READ_1_4_4_D / SPINOR_OP_READ4_1_4_4_D > > > > [3] add set_ddr_quad_mode() to initialize for the DDR quad read. > > Currently it only works for Spansion NOR. > > > > [3] set the dummy with 8 for DDR quad read. > > The m25p80.c can not support the DDR quad read, the SPI NOR > > controller can set the dummy value in its driver, such as fsl-quadspi.c. > > > > Test this patch for Spansion s25fl128s NOR flash. > > > > Signed-off-by: Huang Shijie > > --- > > drivers/mtd/spi-nor/spi-nor.c | 50 > > +++++++++++++++++++++++++++++++++++++++- include/linux/mtd/spi-nor.h | > > 8 +++++- > > 2 files changed, 54 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > > index 1a12f81..e2f69db 100644 > > --- a/drivers/mtd/spi-nor/spi-nor.c > > +++ b/drivers/mtd/spi-nor/spi-nor.c > > @@ -74,6 +74,15 @@ static int read_cr(struct spi_nor *nor) > > static inline int spi_nor_read_dummy_cycles(struct spi_nor *nor) > > { > > switch (nor->flash_read) { > > + case SPI_NOR_DDR_QUAD: > > + /* > > + * The m25p80.c can not support the DDR quad read. > > + * We set the dummy cycles to 8 by default. If the SPI NOR > > + * controller driver has already set it before call the > > + * spi_nor_scan(), we just keep it as it is. > > + */ > > + if (nor->read_dummy) > > + return nor->read_dummy; > > Can the controller set this variable to zero ? The default value of this variable is zero. It it meaningless to set zero. The DDR Quad read definitely will use a non-zero dummy. > > [...] > > > +static int set_ddr_quad_mode(struct spi_nor *nor, u32 jedec_id) > > +{ > > + int status; > > + > > + switch (JEDEC_MFR(jedec_id)) { > > + case CFI_MFR_AMD: /* Spansion, actually */ > > + status = spansion_quad_enable(nor); > > + if (status) { > > + dev_err(nor->dev, > > + "Spansion DDR quad-read not enabled\n"); > > + return -EINVAL; > > Can't you just return status here as well to propagate the failure? ok. thanks Huang Shijie From mboxrd@z Thu Jan 1 00:00:00 1970 Date: Thu, 24 Apr 2014 12:53:34 +0800 From: Huang Shijie To: Marek Vasut Subject: Re: [PATCH v1 2/7] mtd: spi-nor: add DDR quad read support Message-ID: <20140424045332.GB29664@localhost> References: <1398248215-26768-3-git-send-email-b32955@freescale.com> <201404232145.57404.marex@denx.de> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <201404232145.57404.marex@denx.de> Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, computersforpeace@gmail.com, dwmw2@infradead.org, linux-arm-kernel@lists.infradead.org List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Wed, Apr 23, 2014 at 09:45:57PM +0200, Marek Vasut wrote: > On Wednesday, April 23, 2014 at 12:16:50 PM, Huang Shijie wrote: > > This patch adds the DDR quad read support by the following: > > > > [1] add SPI_NOR_DDR_QUAD read mode. > > > > [2] add DDR Quad read opcodes: > > SPINOR_OP_READ_1_4_4_D / SPINOR_OP_READ4_1_4_4_D > > > > [3] add set_ddr_quad_mode() to initialize for the DDR quad read. > > Currently it only works for Spansion NOR. > > > > [3] set the dummy with 8 for DDR quad read. > > The m25p80.c can not support the DDR quad read, the SPI NOR > > controller can set the dummy value in its driver, such as fsl-quadspi.c. > > > > Test this patch for Spansion s25fl128s NOR flash. > > > > Signed-off-by: Huang Shijie > > --- > > drivers/mtd/spi-nor/spi-nor.c | 50 > > +++++++++++++++++++++++++++++++++++++++- include/linux/mtd/spi-nor.h | > > 8 +++++- > > 2 files changed, 54 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > > index 1a12f81..e2f69db 100644 > > --- a/drivers/mtd/spi-nor/spi-nor.c > > +++ b/drivers/mtd/spi-nor/spi-nor.c > > @@ -74,6 +74,15 @@ static int read_cr(struct spi_nor *nor) > > static inline int spi_nor_read_dummy_cycles(struct spi_nor *nor) > > { > > switch (nor->flash_read) { > > + case SPI_NOR_DDR_QUAD: > > + /* > > + * The m25p80.c can not support the DDR quad read. > > + * We set the dummy cycles to 8 by default. If the SPI NOR > > + * controller driver has already set it before call the > > + * spi_nor_scan(), we just keep it as it is. > > + */ > > + if (nor->read_dummy) > > + return nor->read_dummy; > > Can the controller set this variable to zero ? The default value of this variable is zero. It it meaningless to set zero. The DDR Quad read definitely will use a non-zero dummy. > > [...] > > > +static int set_ddr_quad_mode(struct spi_nor *nor, u32 jedec_id) > > +{ > > + int status; > > + > > + switch (JEDEC_MFR(jedec_id)) { > > + case CFI_MFR_AMD: /* Spansion, actually */ > > + status = spansion_quad_enable(nor); > > + if (status) { > > + dev_err(nor->dev, > > + "Spansion DDR quad-read not enabled\n"); > > + return -EINVAL; > > Can't you just return status here as well to propagate the failure? ok. thanks Huang Shijie From mboxrd@z Thu Jan 1 00:00:00 1970 From: b32955@freescale.com (Huang Shijie) Date: Thu, 24 Apr 2014 12:53:34 +0800 Subject: [PATCH v1 2/7] mtd: spi-nor: add DDR quad read support In-Reply-To: <201404232145.57404.marex@denx.de> References: <1398248215-26768-3-git-send-email-b32955@freescale.com> <201404232145.57404.marex@denx.de> Message-ID: <20140424045332.GB29664@localhost> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, Apr 23, 2014 at 09:45:57PM +0200, Marek Vasut wrote: > On Wednesday, April 23, 2014 at 12:16:50 PM, Huang Shijie wrote: > > This patch adds the DDR quad read support by the following: > > > > [1] add SPI_NOR_DDR_QUAD read mode. > > > > [2] add DDR Quad read opcodes: > > SPINOR_OP_READ_1_4_4_D / SPINOR_OP_READ4_1_4_4_D > > > > [3] add set_ddr_quad_mode() to initialize for the DDR quad read. > > Currently it only works for Spansion NOR. > > > > [3] set the dummy with 8 for DDR quad read. > > The m25p80.c can not support the DDR quad read, the SPI NOR > > controller can set the dummy value in its driver, such as fsl-quadspi.c. > > > > Test this patch for Spansion s25fl128s NOR flash. > > > > Signed-off-by: Huang Shijie > > --- > > drivers/mtd/spi-nor/spi-nor.c | 50 > > +++++++++++++++++++++++++++++++++++++++- include/linux/mtd/spi-nor.h | > > 8 +++++- > > 2 files changed, 54 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > > index 1a12f81..e2f69db 100644 > > --- a/drivers/mtd/spi-nor/spi-nor.c > > +++ b/drivers/mtd/spi-nor/spi-nor.c > > @@ -74,6 +74,15 @@ static int read_cr(struct spi_nor *nor) > > static inline int spi_nor_read_dummy_cycles(struct spi_nor *nor) > > { > > switch (nor->flash_read) { > > + case SPI_NOR_DDR_QUAD: > > + /* > > + * The m25p80.c can not support the DDR quad read. > > + * We set the dummy cycles to 8 by default. If the SPI NOR > > + * controller driver has already set it before call the > > + * spi_nor_scan(), we just keep it as it is. > > + */ > > + if (nor->read_dummy) > > + return nor->read_dummy; > > Can the controller set this variable to zero ? The default value of this variable is zero. It it meaningless to set zero. The DDR Quad read definitely will use a non-zero dummy. > > [...] > > > +static int set_ddr_quad_mode(struct spi_nor *nor, u32 jedec_id) > > +{ > > + int status; > > + > > + switch (JEDEC_MFR(jedec_id)) { > > + case CFI_MFR_AMD: /* Spansion, actually */ > > + status = spansion_quad_enable(nor); > > + if (status) { > > + dev_err(nor->dev, > > + "Spansion DDR quad-read not enabled\n"); > > + return -EINVAL; > > Can't you just return status here as well to propagate the failure? ok. thanks Huang Shijie