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From: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
To: Borislav Petkov <bp-Gina5bIWoIWzQB+pC5nmwQ@public.gmane.org>
Cc: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"linux-edac-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-edac-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Mark Rutland <Mark.Rutland-5wv7dgnIgG8@public.gmane.org>,
	Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH v6 3/5] devicetree: bindings: Document Krait cache error interrupts
Date: Tue, 29 Apr 2014 11:34:00 +0100	[thread overview]
Message-ID: <20140429103400.GB22015@e102568-lin.cambridge.arm.com> (raw)
In-Reply-To: <20140408153925.GJ30077-fF5Pk5pvG8Y@public.gmane.org>

On Tue, Apr 08, 2014 at 04:39:25PM +0100, Borislav Petkov wrote:
> On Fri, Apr 04, 2014 at 12:57:28PM -0700, Stephen Boyd wrote:
> > The Krait L1/L2 error reporting hardware is made up a per-CPU
> > interrupt for the L1 cache and a SPI interrupt for the L2.
> > 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> > Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
> > Cc: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> > Cc: <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
> > Signed-off-by: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> > ---
> >  Documentation/devicetree/bindings/arm/cache.txt | 48 ++++++++++++++++++++++++-
> >  1 file changed, 47 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/arm/cache.txt b/Documentation/devicetree/bindings/arm/cache.txt
> > index b90fcc7c53cf..d7357e777399 100644
> > --- a/Documentation/devicetree/bindings/arm/cache.txt
> > +++ b/Documentation/devicetree/bindings/arm/cache.txt
> 
> Right, that's http://www.spinics.net/lists/arm-kernel/msg308540.html
> 
> So whoever picks those patches up, Lorenzo's doc needs to be in his tree
> first too.

Sorry for the delay in replying. Those cache bindings need an ACK to get
merged, and were introduced so that idle states can retrieve power domain
information for caches. I am going to revive the idle bindings thread
to see what we can/should merge of these bindings as things stand, I
really hope this won't block the series any further, otherwise we can
rework the patches so that this series can get in first, or simplify my
series to allow both to get merged as soon as possible without compromising
future requirements.

Thanks,
Lorenzo

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WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
	Mark Rutland <Mark.Rutland@arm.com>,
	Kumar Gala <galak@codeaurora.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v6 3/5] devicetree: bindings: Document Krait cache error interrupts
Date: Tue, 29 Apr 2014 11:34:00 +0100	[thread overview]
Message-ID: <20140429103400.GB22015@e102568-lin.cambridge.arm.com> (raw)
In-Reply-To: <20140408153925.GJ30077@pd.tnic>

On Tue, Apr 08, 2014 at 04:39:25PM +0100, Borislav Petkov wrote:
> On Fri, Apr 04, 2014 at 12:57:28PM -0700, Stephen Boyd wrote:
> > The Krait L1/L2 error reporting hardware is made up a per-CPU
> > interrupt for the L1 cache and a SPI interrupt for the L2.
> > 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: Kumar Gala <galak@codeaurora.org>
> > Cc: <devicetree@vger.kernel.org>
> > Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> > ---
> >  Documentation/devicetree/bindings/arm/cache.txt | 48 ++++++++++++++++++++++++-
> >  1 file changed, 47 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/arm/cache.txt b/Documentation/devicetree/bindings/arm/cache.txt
> > index b90fcc7c53cf..d7357e777399 100644
> > --- a/Documentation/devicetree/bindings/arm/cache.txt
> > +++ b/Documentation/devicetree/bindings/arm/cache.txt
> 
> Right, that's http://www.spinics.net/lists/arm-kernel/msg308540.html
> 
> So whoever picks those patches up, Lorenzo's doc needs to be in his tree
> first too.

Sorry for the delay in replying. Those cache bindings need an ACK to get
merged, and were introduced so that idle states can retrieve power domain
information for caches. I am going to revive the idle bindings thread
to see what we can/should merge of these bindings as things stand, I
really hope this won't block the series any further, otherwise we can
rework the patches so that this series can get in first, or simplify my
series to allow both to get merged as soon as possible without compromising
future requirements.

Thanks,
Lorenzo


WARNING: multiple messages have this Message-ID (diff)
From: lorenzo.pieralisi@arm.com (Lorenzo Pieralisi)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 3/5] devicetree: bindings: Document Krait cache error interrupts
Date: Tue, 29 Apr 2014 11:34:00 +0100	[thread overview]
Message-ID: <20140429103400.GB22015@e102568-lin.cambridge.arm.com> (raw)
In-Reply-To: <20140408153925.GJ30077@pd.tnic>

On Tue, Apr 08, 2014 at 04:39:25PM +0100, Borislav Petkov wrote:
> On Fri, Apr 04, 2014 at 12:57:28PM -0700, Stephen Boyd wrote:
> > The Krait L1/L2 error reporting hardware is made up a per-CPU
> > interrupt for the L1 cache and a SPI interrupt for the L2.
> > 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: Kumar Gala <galak@codeaurora.org>
> > Cc: <devicetree@vger.kernel.org>
> > Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> > ---
> >  Documentation/devicetree/bindings/arm/cache.txt | 48 ++++++++++++++++++++++++-
> >  1 file changed, 47 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/arm/cache.txt b/Documentation/devicetree/bindings/arm/cache.txt
> > index b90fcc7c53cf..d7357e777399 100644
> > --- a/Documentation/devicetree/bindings/arm/cache.txt
> > +++ b/Documentation/devicetree/bindings/arm/cache.txt
> 
> Right, that's http://www.spinics.net/lists/arm-kernel/msg308540.html
> 
> So whoever picks those patches up, Lorenzo's doc needs to be in his tree
> first too.

Sorry for the delay in replying. Those cache bindings need an ACK to get
merged, and were introduced so that idle states can retrieve power domain
information for caches. I am going to revive the idle bindings thread
to see what we can/should merge of these bindings as things stand, I
really hope this won't block the series any further, otherwise we can
rework the patches so that this series can get in first, or simplify my
series to allow both to get merged as soon as possible without compromising
future requirements.

Thanks,
Lorenzo

  parent reply	other threads:[~2014-04-29 10:34 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-04 19:57 [PATCH v6 0/5] Krait L1/L2 EDAC driver Stephen Boyd
2014-04-04 19:57 ` Stephen Boyd
2014-04-04 19:57 ` [PATCH v6 1/5] genirq: export percpu irq functions for module usage Stephen Boyd
2014-04-04 19:57   ` Stephen Boyd
2014-04-04 19:57   ` Stephen Boyd
2014-04-04 19:57 ` [PATCH v6 2/5] ARM: Add Krait L2 register accessor functions Stephen Boyd
2014-04-04 19:57   ` Stephen Boyd
2014-04-07 20:18   ` Borislav Petkov
2014-04-07 20:18     ` Borislav Petkov
2014-04-07 21:56     ` Stephen Boyd
2014-04-07 21:56       ` Stephen Boyd
2014-04-08  6:43       ` Borislav Petkov
2014-04-08  6:43         ` Borislav Petkov
2014-04-08 14:25         ` Christopher Covington
2014-04-08 14:25           ` Christopher Covington
2014-04-08 15:10           ` Borislav Petkov
2014-04-08 15:10             ` Borislav Petkov
2014-04-08 16:19             ` One Thousand Gnomes
2014-04-08 16:19               ` One Thousand Gnomes
2014-04-08 16:42               ` Borislav Petkov
2014-04-08 16:42                 ` Borislav Petkov
2014-04-04 19:57 ` [PATCH v6 3/5] devicetree: bindings: Document Krait cache error interrupts Stephen Boyd
2014-04-04 19:57   ` Stephen Boyd
2014-04-04 19:57   ` Stephen Boyd
2014-04-08 15:39   ` Borislav Petkov
2014-04-08 15:39     ` Borislav Petkov
2014-04-08 19:55     ` Stephen Boyd
2014-04-08 19:55       ` Stephen Boyd
     [not found]     ` <20140408153925.GJ30077-fF5Pk5pvG8Y@public.gmane.org>
2014-04-29 10:34       ` Lorenzo Pieralisi [this message]
2014-04-29 10:34         ` Lorenzo Pieralisi
2014-04-29 10:34         ` Lorenzo Pieralisi
2014-04-29 19:02         ` Borislav Petkov
2014-04-29 19:02           ` Borislav Petkov
2014-04-29 19:02           ` Borislav Petkov
2014-04-04 19:57 ` [PATCH v6 4/5] edac: Add support for Krait CPU cache error detection Stephen Boyd
2014-04-04 19:57   ` Stephen Boyd
2014-04-08 17:35   ` Borislav Petkov
2014-04-08 17:35     ` Borislav Petkov
2014-04-08 19:54     ` Stephen Boyd
2014-04-08 19:54       ` Stephen Boyd
2014-04-09 15:24       ` Borislav Petkov
2014-04-09 15:24         ` Borislav Petkov
2014-04-04 19:57 ` [PATCH v6 5/5] ARM: dts: msm: Fix Krait CPU/L2 nodes Stephen Boyd
2014-04-04 19:57   ` Stephen Boyd

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