From: Francois Romieu <romieu@fr.zoreil.com>
To: Alex Williamson <alex.williamson@redhat.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org
Subject: Re: [Qemu-devel] [PATCH] vfio-pci: Quirk RTL8168 NIC
Date: Wed, 14 May 2014 00:22:57 +0200 [thread overview]
Message-ID: <20140513222257.GA8860@electric-eye.fr.zoreil.com> (raw)
In-Reply-To: <1399950404.6734.147.camel@bling.home>
Alex Williamson <alex.williamson@redhat.com> :
[...]
> > Oh right, I looked for code references to the register but didn't notice
> > that Linux configures it for MSI, not MSI-X. In my brief testing I only
> > saw that Windows generates interrupts on the first vector, so perhaps
> > not much lost without the extra vectors. I guess it's this patch that
> > proves that MSI-X can be configured without this backdoor then. Do you
> > have any insight into why this exists ?
No. I can only speculate that bar registers exhaustion and 64 bits decoders
are not completely alien to this. Hayes may provide some hindsight.
[...]
> So the cycle is:
>
> word read from command register: I/O+ Mem+ BusMaster+ DisINTx+ SERR+
>
> byte read from PCIe link control register[0]: CommClk+
> byte read from PCIe link control register[1]: nothing
>
> I'll be interested if that means anything to you. It's not a very high
> rate access, the command register access is maybe 1Hz. Thanks,
Nothing specific. It reminds me of rtl8168_esd_timer - kind of periodic
sanity check - in Realtek's own 8168 driver but the pattern is a bit
different. I need to check some recent revision of it though.
--
Ueimor
prev parent reply other threads:[~2014-05-13 22:23 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-10 23:03 [PATCH] vfio-pci: Quirk RTL8168 NIC Alex Williamson
2014-05-10 23:03 ` [Qemu-devel] " Alex Williamson
2014-05-12 20:02 ` Francois Romieu
2014-05-12 20:02 ` [Qemu-devel] " Francois Romieu
2014-05-12 20:28 ` Alex Williamson
2014-05-12 20:28 ` [Qemu-devel] " Alex Williamson
2014-05-13 3:06 ` Alex Williamson
2014-05-13 22:22 ` Francois Romieu [this message]
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