From mboxrd@z Thu Jan  1 00:00:00 1970
From: Russell King - ARM Linux <linux@arm.linux.org.uk>
Subject: Re: [PATCH] imx-drm: imx-hdmi: fix hdmi hotplug detection initial
 state
Date: Mon, 9 Jun 2014 20:29:46 +0100
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To: Fabio Estevam <festevam@gmail.com>
Cc: devel@driverdev.osuosl.org, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, DRI mailing list <dri-devel@lists.freedesktop.org>, Shawn Guo <shawn.guo@freescale.com>
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On Mon, Jun 09, 2014 at 03:38:55PM -0300, Fabio Estevam wrote:
> On Mon, Jun 9, 2014 at 3:15 PM, Fabio Estevam <festevam@gmail.com> wrote:
> >> I wonder if the problem is that HDMI and LVDS are interfering with each
> >> other wrt the required pixel clock, and LVDS is winning.  If we have
> >> HDMI enabled, many HDMI sinks will only work if we set one of their
> >> supported modes (with the dot clock within 1% - though some sinks are
> >> more lenient).
> >
> > Yes, it seems this is the case.
> 
> I tested not using pll5 as the parent of LVDS:
> 
> --- a/arch/arm/mach-imx/clk-imx6q.c
> +++ b/arch/arm/mach-imx/clk-imx6q.c
> @@ -439,12 +439,6 @@ static void __init imx6q_clocks_init(struct device_node *cc
>         clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
>         clk_register_clkdev(clk[enet_ref], "enet_ref", NULL);
> 
> -       if ((imx_get_soc_revision() != IMX_CHIP_REVISION_1_0) ||
> -           cpu_is_imx6dl()) {
> -               clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]);
> -               clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]);
> -       }
> -
>         clk_set_parent(clk[ipu1_di0_pre_sel], clk[pll5_video_div]);
>         clk_set_parent(clk[ipu1_di1_pre_sel], clk[pll5_video_div]);
>         clk_set_parent(clk[ipu2_di0_pre_sel], clk[pll5_video_div]);
> 
> 
> Then the HDMI detection works fine and I get images on both HDMI and LVDS.
> 
> I understand that many LVDS panels need a frequency range that can
> only be obtained via PLL5 though.

HDMI pretty much fundamentally requires PLL5.

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