From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mukesh Rathor Subject: Re: AMD support of hvm_vcpu.single_step Date: Wed, 11 Jun 2014 15:32:44 -0700 Message-ID: <20140611153244.59653c74@mantra.us.oracle.com> References: <20140610144948.4d001df3@mantra.us.oracle.com> <53987C1F.4080303@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <53987C1F.4080303@oracle.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Boris Ostrovsky Cc: "Xen-devel@lists.xensource.com" , Aravind.Gopalakrishnan@amd.com, suravee.suthikulpanit@amd.com List-Id: xen-devel@lists.xenproject.org On Wed, 11 Jun 2014 11:56:15 -0400 Boris Ostrovsky wrote: > On 06/10/2014 05:49 PM, Mukesh Rathor wrote: > > Hi AMD folks, > > > > I am unable to see support of single step on amd platform. On intel, > > hvm_vcpu.single_step will cause MTF to be set in vmx_intr_assist: > > > > /* Block event injection when single step with MTF. */ > > if ( unlikely(v->arch.hvm_vcpu.single_step) ) > > { > > v->arch.hvm_vmx.exec_control |= > > CPU_BASED_MONITOR_TRAP_FLAG; vmx_update_cpu_exec_control(v); > > return; > > } > > > > I don't see equivalent on amd? > > I think HW performs TF bit manipulations that your patch is > suggesting (per 13.1.4 of APMv2) It only clears it, not set it. Patch on the way. thanks mukesh