From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43024) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wxjrb-0003QT-3x for qemu-devel@nongnu.org; Thu, 19 Jun 2014 17:27:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wxjra-0001ym-4R for qemu-devel@nongnu.org; Thu, 19 Jun 2014 17:27:19 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:51809) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WxjrZ-0001yZ-Ug for qemu-devel@nongnu.org; Thu, 19 Jun 2014 17:27:18 -0400 Date: Thu, 19 Jun 2014 23:27:15 +0200 From: Aurelien Jarno Message-ID: <20140619212715.GA14248@ohm.rr44.fr> References: <1402499992-64851-1-git-send-email-leon.alrae@imgtec.com> <1402499992-64851-21-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1402499992-64851-21-git-send-email-leon.alrae@imgtec.com> Subject: Re: [Qemu-devel] [PATCH v2 20/22] mips_malta: update malta's pseudo-bootloader - replace JR with JALR List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Leon Alrae Cc: yongbok.kim@imgtec.com, cristian.cuna@imgtec.com, qemu-devel@nongnu.org, rth@twiddle.net On Wed, Jun 11, 2014 at 04:19:50PM +0100, Leon Alrae wrote: > JR has been removed in R6 and now this instruction will cause Reserved > Instruction Exception. Therefore use JALR with rd=0 which is equivalent to JR. > > Signed-off-by: Leon Alrae > --- > hw/mips/mips_malta.c | 10 +++++----- > 1 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c > index f4a7d47..72071c0 100644 > --- a/hw/mips/mips_malta.c > +++ b/hw/mips/mips_malta.c > @@ -694,12 +694,12 @@ static void write_bootloader (CPUMIPSState *env, uint8_t *base, > /* Jump to kernel code */ > stl_p(p++, 0x3c1f0000 | ((kernel_entry >> 16) & 0xffff)); /* lui ra, high(kernel_entry) */ > stl_p(p++, 0x37ff0000 | (kernel_entry & 0xffff)); /* ori ra, ra, low(kernel_entry) */ > - stl_p(p++, 0x03e00008); /* jr ra */ > + stl_p(p++, 0x03e00009); /* jalr ra */ > stl_p(p++, 0x00000000); /* nop */ > > /* YAMON subroutines */ > p = (uint32_t *) (base + 0x800); > - stl_p(p++, 0x03e00008); /* jr ra */ > + stl_p(p++, 0x03e00009); /* jalr ra */ > stl_p(p++, 0x24020000); /* li v0,0 */ > /* 808 YAMON print */ > stl_p(p++, 0x03e06821); /* move t5,ra */ > @@ -713,7 +713,7 @@ static void write_bootloader (CPUMIPSState *env, uint8_t *base, > stl_p(p++, 0x00000000); /* nop */ > stl_p(p++, 0x08000205); /* j 814 */ > stl_p(p++, 0x00000000); /* nop */ > - stl_p(p++, 0x01a00008); /* jr t5 */ > + stl_p(p++, 0x01a00009); /* jalr t5 */ > stl_p(p++, 0x01602021); /* move a0,t3 */ > /* 0x83c YAMON print_count */ > stl_p(p++, 0x03e06821); /* move t5,ra */ > @@ -727,7 +727,7 @@ static void write_bootloader (CPUMIPSState *env, uint8_t *base, > stl_p(p++, 0x258cffff); /* addiu t4,t4,-1 */ > stl_p(p++, 0x1580fffa); /* bnez t4,84c */ > stl_p(p++, 0x00000000); /* nop */ > - stl_p(p++, 0x01a00008); /* jr t5 */ > + stl_p(p++, 0x01a00009); /* jalr t5 */ > stl_p(p++, 0x01602021); /* move a0,t3 */ > /* 0x870 */ > stl_p(p++, 0x3c08b800); /* lui t0,0xb400 */ > @@ -737,7 +737,7 @@ static void write_bootloader (CPUMIPSState *env, uint8_t *base, > stl_p(p++, 0x31290040); /* andi t1,t1,0x40 */ > stl_p(p++, 0x1120fffc); /* beqz t1,878 */ > stl_p(p++, 0x00000000); /* nop */ > - stl_p(p++, 0x03e00008); /* jr ra */ > + stl_p(p++, 0x03e00009); /* jalr ra */ > stl_p(p++, 0xa1040000); /* sb a0,0(t0) */ > Reviewed-by: Aurelien Jarno -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurelien@aurel32.net http://www.aurel32.net