From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44815) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0Bmt-0005m0-Gu for qemu-devel@nongnu.org; Thu, 26 Jun 2014 11:40:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X0Bml-0004Zn-Qu for qemu-devel@nongnu.org; Thu, 26 Jun 2014 11:40:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47146) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0Bml-0004Zg-IC for qemu-devel@nongnu.org; Thu, 26 Jun 2014 11:40:27 -0400 Date: Thu, 26 Jun 2014 18:40:32 +0300 From: "Michael S. Tsirkin" Message-ID: <20140626154032.GA27566@redhat.com> References: <53AA9480.1010005@intel.com> <53AA96DF.6070501@redhat.com> <53AA9B58.6050803@intel.com> <53AA9C4E.9070506@redhat.com> <53ABE551.3080407@intel.com> <53ABF00E.6000309@redhat.com> <20140626112603.GC21685@redhat.com> <53AC0462.8010207@redhat.com> <20140626113624.GG21685@redhat.com> <53AC2063.2070501@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <53AC2063.2070501@redhat.com> Subject: Re: [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, Kelly.Zytaruk@amd.com, yang.z.zhang@intel.com, anthony@codemonkey.ws, anthony.perard@citrix.com, "Chen, Tiejun" On Thu, Jun 26, 2014 at 03:30:11PM +0200, Paolo Bonzini wrote: > Il 26/06/2014 13:36, Michael S. Tsirkin ha scritto: > >>It should be this way in real hardware too > >But it isn't. > > That's why I mentioned that this hack should become architecturally > specified (since it can work on real hardware too) Someone will have to implement it on real hardware first :) As long as no one does it's really PV. I have no problem with PV as such, however 1. let's try to make it look less like a one-off hack 2. let's start with proper emulation, pv as step 2 > with QEMU doing the > emulation for current-generation devices. > > >> (not exactly _this_ hack, but at least no improper relationship among > >> IGD/MCH/PCH). > > > >Well that dependency between devices is common for embedded hardware, > >and this is what we have here. > > Sure, but then you should put MCH/PCH/IGD in the same IOMMU group, which > basically means forgetting about IGD assignment. > > Paolo I don't see why. We emulate parts of devices (e.g. BARs), ISA bridge/MCH is just such part of device that we emulate. -- MST From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Michael S. Tsirkin" Subject: Re: [v5][PATCH 0/5] xen: add Intel IGD passthrough support Date: Thu, 26 Jun 2014 18:40:32 +0300 Message-ID: <20140626154032.GA27566@redhat.com> References: <53AA9480.1010005@intel.com> <53AA96DF.6070501@redhat.com> <53AA9B58.6050803@intel.com> <53AA9C4E.9070506@redhat.com> <53ABE551.3080407@intel.com> <53ABF00E.6000309@redhat.com> <20140626112603.GC21685@redhat.com> <53AC0462.8010207@redhat.com> <20140626113624.GG21685@redhat.com> <53AC2063.2070501@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <53AC2063.2070501@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org To: Paolo Bonzini Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, Kelly.Zytaruk@amd.com, yang.z.zhang@intel.com, anthony@codemonkey.ws, anthony.perard@citrix.com, "Chen, Tiejun" List-Id: xen-devel@lists.xenproject.org On Thu, Jun 26, 2014 at 03:30:11PM +0200, Paolo Bonzini wrote: > Il 26/06/2014 13:36, Michael S. Tsirkin ha scritto: > >>It should be this way in real hardware too > >But it isn't. > > That's why I mentioned that this hack should become architecturally > specified (since it can work on real hardware too) Someone will have to implement it on real hardware first :) As long as no one does it's really PV. I have no problem with PV as such, however 1. let's try to make it look less like a one-off hack 2. let's start with proper emulation, pv as step 2 > with QEMU doing the > emulation for current-generation devices. > > >> (not exactly _this_ hack, but at least no improper relationship among > >> IGD/MCH/PCH). > > > >Well that dependency between devices is common for embedded hardware, > >and this is what we have here. > > Sure, but then you should put MCH/PCH/IGD in the same IOMMU group, which > basically means forgetting about IGD assignment. > > Paolo I don't see why. We emulate parts of devices (e.g. BARs), ISA bridge/MCH is just such part of device that we emulate. -- MST