From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54578) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X1ZoR-0001ZK-Lv for qemu-devel@nongnu.org; Mon, 30 Jun 2014 07:32:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X1ZoL-0004bG-Fg for qemu-devel@nongnu.org; Mon, 30 Jun 2014 07:31:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:21498) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X1ZoL-0004bB-8A for qemu-devel@nongnu.org; Mon, 30 Jun 2014 07:31:49 -0400 Date: Mon, 30 Jun 2014 14:31:59 +0300 From: "Michael S. Tsirkin" Message-ID: <20140630113159.GB29477@redhat.com> References: <53ABE551.3080407@intel.com> <53ABF00E.6000309@redhat.com> <53B0D0C5.60000@intel.com> <20140630064822.GB14491@redhat.com> <53B110CA.6070606@intel.com> <20140630090511.GB15777@redhat.com> <53B1300D.10001@intel.com> <20140630095509.GA17700@redhat.com> <53B139E6.1020607@intel.com> <53B1479B.3030707@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <53B1479B.3030707@redhat.com> Subject: Re: [Qemu-devel] [Xen-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, Kelly.Zytaruk@amd.com, yang.z.zhang@intel.com, anthony@codemonkey.ws, anthony.perard@citrix.com, "Chen, Tiejun" On Mon, Jun 30, 2014 at 01:18:51PM +0200, Paolo Bonzini wrote: > Il 30/06/2014 12:20, Chen, Tiejun ha scritto: > > > >I already post this to mainline to change as follows: > > > >- while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) { > >+ pch = pci_get_bus_and_slot(0, PCI_DEVFN(0x1f, 0)); > >+ if (pch) { > > > >Please refer to this, > > > >[RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead > >of check class type > > > >Linux Native guys would like to accept this. And actually Windows always > >use devfn to detect this. > > Fair enough, but that means that, when using IGD, Q35 will have to move the > ISA bridge off 1f.0. > > To me it seems fairly clear that as things stand IGD is not virtualizable > without PV support. We're beating a dead horse. > > Paolo It seems virtualizeable without PV. Virtualizing it just requires emulating a chipset that's closer to what the driver expects, which seems to be more effort than Tiejun is prepared to put in. -- MST From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Michael S. Tsirkin" Subject: Re: [Xen-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support Date: Mon, 30 Jun 2014 14:31:59 +0300 Message-ID: <20140630113159.GB29477@redhat.com> References: <53ABE551.3080407@intel.com> <53ABF00E.6000309@redhat.com> <53B0D0C5.60000@intel.com> <20140630064822.GB14491@redhat.com> <53B110CA.6070606@intel.com> <20140630090511.GB15777@redhat.com> <53B1300D.10001@intel.com> <20140630095509.GA17700@redhat.com> <53B139E6.1020607@intel.com> <53B1479B.3030707@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <53B1479B.3030707@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org To: Paolo Bonzini Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, Kelly.Zytaruk@amd.com, yang.z.zhang@intel.com, anthony@codemonkey.ws, anthony.perard@citrix.com, "Chen, Tiejun" List-Id: xen-devel@lists.xenproject.org On Mon, Jun 30, 2014 at 01:18:51PM +0200, Paolo Bonzini wrote: > Il 30/06/2014 12:20, Chen, Tiejun ha scritto: > > > >I already post this to mainline to change as follows: > > > >- while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) { > >+ pch = pci_get_bus_and_slot(0, PCI_DEVFN(0x1f, 0)); > >+ if (pch) { > > > >Please refer to this, > > > >[RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead > >of check class type > > > >Linux Native guys would like to accept this. And actually Windows always > >use devfn to detect this. > > Fair enough, but that means that, when using IGD, Q35 will have to move the > ISA bridge off 1f.0. > > To me it seems fairly clear that as things stand IGD is not virtualizable > without PV support. We're beating a dead horse. > > Paolo It seems virtualizeable without PV. Virtualizing it just requires emulating a chipset that's closer to what the driver expects, which seems to be more effort than Tiejun is prepared to put in. -- MST