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Date: Mon, 28 Jul 2014 23:42:30 +0200
From: Aurelien Jarno <aurelien@aurel32.net>
Message-ID: <20140728214230.GA24651@ohm.rr44.fr>
References: <1406563102-11035-1-git-send-email-elta.era@gmail.com>
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Subject: Re: [Qemu-devel] [PATCH 1/2] target-mips/translate.c: Free TCG in
	OPC_DINSV
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To: Dongxue Zhang <elta.era@gmail.com>
Cc: qemu-devel@nongnu.org

On Mon, Jul 28, 2014 at 11:58:21PM +0800, Dongxue Zhang wrote:
> Free t0 and t1 in opcode OPC_DINSV.
> 
> Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
> ---
>  target-mips/translate.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index d7b8c4d..c381366 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -15300,6 +15300,9 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx)
>                      gen_load_gpr(t1, rs);
>  
>                      gen_helper_dinsv(cpu_gpr[rt], cpu_env, t1, t0);
> +
> +                    tcg_temp_free(t0);
> +                    tcg_temp_free(t1);
>                      break;
>                  }
>              default:            /* Invalid */

Good catch, I applied the patch.

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net