From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [PATCH 03/15] drm/i915: Upgrade execbuffer fail
 after resume failure to EIO
Date: Fri, 8 Aug 2014 10:17:10 +0100
Message-ID: <20140808091710.GC3021@nuc-i3427.alporthouse.com>
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To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org, Rodrigo Vivi <rodrigo.vivi@intel.com>
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On Wed, Aug 06, 2014 at 10:39:16AM +0200, Daniel Vetter wrote:
> On Wed, Aug 06, 2014 at 09:12:32AM +0100, Chris Wilson wrote:
> > On Wed, Aug 06, 2014 at 09:56:45AM +0200, Daniel Vetter wrote:
> > > On Tue, Aug 05, 2014 at 07:51:14AM -0700, Rodrigo Vivi wrote:
> > > > From: Chris Wilson <chris@chris-wilson.co.uk>
> > > > 
> > > > If we try to execute on a known ring, but it has failed to be
> > > > initialised correctly, report that the GPU is hung rather than the
> > > > command invalid. This leaves us reporting EINVAL only if the user
> > > > requests execution on a ring that is not supported by the device.
> > > > 
> > > > This should prevent UXA from getting stuck in a null render loop after a
> > > > failed resume.
> > > > 
> > > > v2 (Rodrigo): Fix conflict and add VCS2 ring and
> > > >    	      s/intel_ring_buffer/intel_engine_cs.
> > > > 
> > > > Reported-by: Jiri Kosina <jikos@jikos.cz>
> > > > References: https://bugs.freedesktop.org/show_bug.cgi?id=76554
> > > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > 
> > > This isn't required any more, see
> > > 
> > > commit 074c6adaf4e7d1423d373bd5d1afc20b683cb4d0
> > > Author: Chris Wilson <chris@chris-wilson.co.uk>
> > > Date:   Wed Apr 9 09:19:43 2014 +0100
> > > 
> > >     drm/i915: Mark device as wedged if we fail to resume
> > > 
> > > for the alternate merged patch.
> > 
> > Hmm, there is still a path that ends here, but the example above is
> > already fixed as you say.
> 
> We have the EIO check both in the resume and driver load paths. Which
> other path are we missing?

The GPU may be set to wedged, but this check in execbuffer occurs before
we check for a wedged GPU.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre