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* Updated drm-intel-testing
@ 2014-08-08 18:49 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-08-08 18:49 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

First -testing cycle for 3.18 already:
- Setting dp M2/N2 values plus state checker support (Vandana Kannan)
- chv power well support (Ville)
- DP training pattern 3 support for chv (Ville)
- cleanup of the hsw/bdw ddi pll code, prep work for skl (Damien)
- dsi video burst mode support (Shobhit)
- piles of other chv fixes all over (Ville et. al.)
- cleanup of the ddi translation tables setup code (Damien)
- 180 deg rotation support (Ville & Sonika Jindal)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2018-11-22 15:31 Jani Nikula
  0 siblings, 0 replies; 123+ messages in thread
From: Jani Nikula @ 2018-11-22 15:31 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

It may be about time we update the process around drm-intel-testing, but
here goes anyway...

The following changes tagged drm-intel-testing-2018-11-22:

drm-intel-next-2018-11-22:
Changes outside i915:
- Connector property to limit max bpc (Radhakrishna)
- Fix LPE audio runtime PM and deinit (Ville)
- DP FEC prep work (Anusha)
- Mark pinned shmemfs pages as unevictable (Kuo-Hsin)
- Backmerge drm-next (Jani)

Inside i915:
- Revert OA UAPI change that lacks userspace (Joonas)
- Register macro cleanup (Jani)
- 32-bit build fixes on pin flags (Chris)
- Fix MG DP mode and PHY gating for HDMI (Imre)
- DP MST race, hpd and irq fixes (Lyude)
- Combo PHY fixes and cleanup (Imre, Lucas)
- Move display init and cleanup under modeset init and cleanup (José)
- PSR fixes (José)
- Subslice size fixes (Daniele)
- Abstract and clean up fixed point helpers (Jani)
- Plane input CSC for YUV to RGB conversion (Uma)
- Break long iterations for get/put shmemfs pages (Chris)
- Improve DDI encoder hw state readout sanity checks (Imre)
- Fix power well leaks for MST (José)
- Scaler fixes (Ville)
- Watermark fixes (Ville)
- Fix VLV/CHV DSI panel orientation readout (Ville)
- ICL rawclock fixes (Paulo)
- Workaround DMC power well request issues (Imre)
- Plane allocation fix (Maarten)
- Transcoder enum value/ordering robustness fixes (Imre)
- UTS_RELEASE build dependency fix (Hans Holmberg)

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2018-11-02 10:08 Jani Nikula
  0 siblings, 0 replies; 123+ messages in thread
From: Jani Nikula @ 2018-11-02 10:08 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

The following changes tagged drm-intel-testing-2018-11-02:

drm-intel-next-2018-11-02:
The first big pile of changes for v4.21/v5.1:

- DP Display Stream Compression preliminary work, helpers, etc. (Manasi, Anusha)
- Fix flex IO lane count programming (Manasi)
- GEM selftest updates (Chris, Matthew)
- ICL DSI enabling (Madhav, Jani)
- CSR firmware definition cleanup (Jani)
- CSR ICL stepping info, DC5/DC6 debugfs info (Jyoti)
- intel_display.c cleanups and code movement (Jani, Ville)
- PSR fixes and cleanup, enable PSR1 by default on gen9+ (José, Dhinakaran)
- Perf updates (Lionel)
- DP MST fixes (Lyude)
- Improved DP MST support logging (Ville)
- ICL workarounds (Oscar, Radhakrishna, Lucas, Anuj)
- Workaround cleanups (Rodrigo)
- HDCP 2.2 prep work (Ramalingam)
- AVI infoframes for LSPCON (Shashank)
- CRTC output formats YCBCR 4:2:0 and 4:4:4 (Shashank)
- ICL PLL refactoring (Vandita)
- Watermark fixes (Paulo)
- Master intr fixes (Mika)
- Amberlake platform (José, Shawn)
- Ensure HDA suspend/resume ordering (Imre)
- eDP orientation quirks (Hans)
- DP detect and link retrain fixes and cleanups (Dhinakaran)
- GuC fixes, cleanups and selftests (Daniele, Michal, Chris)
- ICL combophy/TC fixes and cleanups (Mahesh, Lucas, José)
- ICL RGB565 90/270 plane rotation (Juha-Pekka)
- HDMI 2.0 audio N values (Clint)
- Aux channel refactoring, ICL aux power fixes (Imre)
- Opregion suspend/resume improvement (Chris)
- Sort platform if ladders newest-to-oldest (Rodrigo)
- IPC fixes (José)
- PCH reset handshake fixes for PCH NOP (José)
- Store available engine masks in intel info (Tvrtko)
- Fix video DIP register definitions (Dhinakaran)
- ICL planar formats, NV12 (Maarten)
- Plane alpha blending support (Maarten)
- crtc->config usage removal cleanups (Maarten)
- Plane init cleanups (Ville)
- Use BITS_PER_TYPE (Chris)
- Remove i915.enable_ppgtt override (Chris)
- Scheduling priority improvements (Chris)
- Fix GTT 64-bit computations on 32-bit systems (Chris)
- A number of display fixes all around... (Ville)
- A number of GEM fixes all around... (Chris)
- Tons of other fixes and improvements (Everyone)
- Failure to properly credit everyone in the above changelog (Jani)

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2018-09-21 11:03 Joonas Lahtinen
  0 siblings, 0 replies; 123+ messages in thread
From: Joonas Lahtinen @ 2018-09-21 11:03 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

This is the final set of changes going for kernel v4.20,
as per agreement with Dave, I did the tagging now before
-rc5, and we should run some heavy testing on this during
the beginning of next week.

Regards, Joonas

The following changes tagged drm-intel-testing-2018-09-21:

drm-intel-next-2018-09-21:
Driver Changes:

- Bugzilla 107600: Fix stuttering video playback on MythTV on old hardware (Chris)
- Avoid black screen when using CSC coefficient matrix (Raviraj)
- Hammer PDs on Baytrail to make sure they reload (Chris)
- Capture some objects if unable to capture all, on error (Chris)
- Add W/A for 16 GB DIMMs on SKL+ (Mahesh)
- Only enable IPC for symmetric memory configurations on KBL+ (Mahesh)
- Assume pipe A to have maximum stride limits (Ville)
- Always update update OA contexts via context image (Tvrtko)
- Icelake enabling patches (Madhav, Dhinakaran)
- Add Icelake DMC firmware (Anusha)
- Fixes for CI found corner cases (Chris)
- Limit the backpressure for request allocation (Chris)
- Park GPU on module load so usage starts from known state (Chris)
- Flush tasklet when checking for idle (Chris)
- Use coherent write into the context image on BSW+ (Chris)
- Fix possible integer overflow for framebuffers that get aligned past 4GiB (Ville)
- Downgrade fence timeout from warn to notice and add debug hint (Chris)

- Fixes to multi function encoder code (Ville)
- Fix sprite plane check logic (Dan, Ville)
- PAGE_SIZE vs. I915_GTT_PAGE_SIZE fixes (Ville)
- Decode memory bandwidth and parameters for BXT and SKL+ (Mahesh)
- Overwrite BIOS set IPC value from KMS (Mahesh)
- Multiple pipe handling code cleanups/restructurings/optimizations (Ville)
- Spare low 4G address for non-48bit objects (Chris)
- Free context_setparam of struct_mutex (Chris)
- Delay updating ring register state on resume (Chris)
- Avoid unnecessarily copying overlay IOCTL parameters (Chris)
- Update GuC power domain states even without submission (Michal)
- Restore GuC preempt-context across S3/S4 (Chris)
- Add kernel selftest for rapid context switching (Chris)
- Keep runtime power management ref for live selftests (Chris)
- GEM code cleanups (Matt)
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2018-09-06 12:35 Joonas Lahtinen
  0 siblings, 0 replies; 123+ messages in thread
From: Joonas Lahtinen @ 2018-09-06 12:35 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

The following changes tagged drm-intel-testing-2018-09-06:

drm-intel-next-2018-09-06:
UAPI Changes:
- GGTT coherency GETPARAM: GGTT has turned out to be non-coherent for some
  platforms, which we've failed to communicate to userspace so far. SNA was
  modified to do extra flushing on non-coherent GGTT access, while Mesa will
  mitigate by always requiring WC mapping (which is non-coherent anyway).
- Neuter Resource Streamer uAPI: There never really were users for the feature,
  so neuter it while keeping the interface bits for compatibility. This is a
  long due item from past.

Cross-subsystem Changes:
- Backmerge of branch drm-next-4.19 for DP_DPCD_REV_14 changes

Core Changes:
- None

Driver Changes:

- A load of Icelake (ICL) enabling patches (Paulo, Manasi)
- Enabled full PPGTT for IVB,VLV and HSW (Chris)
- Bugzilla #107113: Distribute DDB based on display resolutions (Mahesh)
- Bugzillas #100023,#107476,#94921: Support limited range DP displays (Jani)
- Bugzilla #107503: Increase LSPCON timeout (Fredrik)
- Avoid boosting GPU due to an occasional stall in interactive workloads (Chris)
- Apply GGTT coherency W/A only for affected systems instead of all (Chris)
- Fix for infinite link training loop for faulty USB-C MST hubs (Nathan)
- Keep KMS functional on Gen4 and earlier when GPU is wedged (Chris)
- Stop holding ppGTT reference from closed VMAs (Chris)
- Clear error registers after error capture (Lionel)
- Various Icelake fixes (Anusha, Jyoti, Ville, Tvrtko)
- Add missing Coffeelake (CFL) PCI IDs (Rodrigo)
- Flush execlists tasklet directly from reset-finish (Chris)
- Fix LPE audio runtime PM (Chris)
- Fix detection of out of range surface positions (GLK/CNL) (Ville)
- Remove wait-for-idle for PSR2 (Dhinakaran)
- Power down existing display hardware resources when display is disabled (Chris)
- Don't allow runtime power management if RC6 doesn't exist (Chris)
- Add debugging checks for runtime power management paths (Imre)
- Increase symmetry in display power init/fini paths (Imre)
- Isolate GVT specific macros from i915_reg.h (Lucas)
- Increase symmetry in power management enable/disable paths (Chris)
- Increase IP disable timeout to 100 ms to avoid DRM_ERROR (Imre)
- Fix memory leak from HDMI HDCP write function (Brian, Rodrigo)
- Reject Y/Yf tiling on interlaced modes (Ville)
- Use a cached mapping for the physical HWS on older gens (Chris)
- Force slow path of writing relocations to buffer if unable to write to userspace (Chris)
- Do a full device reset after being wedged (Chris)
- Keep forcewake counts over reset (in case of debugfs user) (Imre, Chris)
- Avoid false-positive errors from power wells during init (Imre)
- Reset engines forcibly in exchange of declaring whole device wedged (Mika)
- Reduce context HW ID lifetime in preparation for Icelake (Chris)
- Attempt to recover from module load failures (Chris)
- Keep select interrupts over a reset to avoid missing/losing them (Chris)
- GuC submission backend improvements (Jakub)
- Terminate context images with BB_END (Chris, Lionel)
- Make GCC evaluate GGTT view struct size assertions again (Ville)
- Add selftest to exercise suspend/hibernate code-paths for GEM (Chris)
- Use a full emulation of a user ppgtt context in selftests (Chris)
- Exercise resetting in the middle of a wait-on-fence in selftests (Chris)
- Fix coherency issues on selftests for Baytrail (Chris)
- Various other GEM fixes / self-test updates (Chris, Matt)
- GuC doorbell self-tests (Daniele)
- PSR mode control through debugfs for IGTs (Maarten)
- Degrade expected WM latency errors to DRM_DEBUG_KMS (Chris)
- Cope with errors better in MST link training (Dhinakaran)
- Fix WARN on KBL external displays (Azhar)
- Power well code cleanups (Imre)
- Fixes to PSR debugging (Dhinakaran)
- Make forcewake errors louder for easier catching in CI (WARNs) (Chris)
- Fortify tiling code against programmer errors (Chris)
- Bunch of fixes for CI exposed corner cases (multiple authors, mostly Chris)
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2018-05-14 13:05 Jani Nikula
  0 siblings, 0 replies; 123+ messages in thread
From: Jani Nikula @ 2018-05-14 13:05 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

The following changes tagged drm-intel-testing-2018-05-14:

drm-intel-next-2018-05-14:
Last drm/i915 changes for v4.18:

- NV12 enabling (Chandra, Maarten)
- ICL workarounds (Oscar)
- ICL basic DPLL enabling (Paulo)
- GVT updates
- DP link config refactoring (Jani)
- Module parameter to override DMC firmware (Jani)
- PSR updates (José, DK, Daniel, Ville)
- ICL DP vswing programming (Manasi)
- ICL DBuf slice updates (Mahesh)
- Selftest fixes and updates (Chris, Matthew, Oscar)
- Execlist fixes and updates (Chris)
- Stolen memory first 4k fix (Hans de Goede)
- wait_for fixes (Mika)
- Tons of GEM improvements (Chris)
- Plenty of other fixes and improvements (Everyone)
- Crappy changelog (Me)

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2018-04-13 12:28 Jani Nikula
  0 siblings, 0 replies; 123+ messages in thread
From: Jani Nikula @ 2018-04-13 12:28 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

The following changes tagged drm-intel-testing-2018-04-13:

drm-intel-next-2018-04-13:
First drm/i915 feature batch heading for v4.18:

- drm-next backmerge to fix build (Rodrigo)
- GPU documentation improvements (Kevin)
- GuC and HuC refactoring, host/GuC communication, logging, fixes, and more
  (mostly Michal and Michał, also Jackie, Michel and Piotr)
- PSR and PSR2 enabling and fixes (DK, José, Rodrigo and Chris)
- Selftest updates (Chris, Daniele)
- DPLL management refactoring (Lucas)
- DP MST fixes (Lyude and DK)
- Watermark refactoring and changes to support NV12 (Mahesh)
- NV12 prep work (Chandra)
- Icelake Combo PHY enablers (Manasi)
- Perf OA refactoring and ICL enabling (Lionel)
- ICL enabling (Oscar, Paulo, Nabendu, Mika, Kelvin, Michel)
- Workarounds refactoring (Oscar)
- HDCP fixes and improvements (Ramalingam, Radhakrishna)
- Power management fixes (Imre)
- Various display fixes (Maarten, Ville, Vidya, Jani, Gaurav)
- debugfs for FIFO underrun clearing (Maarten)
- Execlist improvements (Chris)
- Reset improvements (Chris)
- Plenty of things here and there I overlooked and/or didn't understand... (Everyone)

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2018-03-08 13:17 Joonas Lahtinen
  0 siblings, 0 replies; 123+ messages in thread
From: Joonas Lahtinen @ 2018-03-08 13:17 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

This will be the tag to become the final kernel 4.17 feature pull
request. A recap of what has been brough in by this development
window (much of which people were on their various vacations):

* Cannonlake support is sufficient to remove alpha_support protection
	* AUX-F port support added
* Icelake base enabling until internal milestone of forcewake support
* Query uAPI interface (used for GPU topology information currently)
* Compressed framebuffer support for sprites
* kmem cache shrinking when GPU is idle
* Avoid boosting GPU when waited item is being processed already
* Avoid	retraining LSPCON link unnecessarily
* Decrease request signaling latency
* Deprecation of I915_SET_COLORKEY_NONE
* Kerneldoc and compiler warning cleanup for upcoming CI enforcements

I will send out the pull request on Monday, so please give it a few spins.

Regards, Joonas

The following changes tagged drm-intel-testing-2018-03-08:

drm-intel-next-2018-03-08:

UAPI Changes:

- Query uAPI interface, used for GPU topology information currently (Lionel)
	* Mesa: https://patchwork.freedesktop.org/series/38795/

Driver Changes:

- Increase PSR2 size for CNL (DK)
- Avoid retraining LSPCON link unnecessarily (Ville)
- Decrease request signaling latency (Chris)
- GuC error capture fix (Daniele)

drm-intel-next-2018-03-05:

Driver Changes:

- Disable FBC on unsupported Gen9/10 configs to avoid flicker (Imre)
- Mark firmware as failed on authentication failure (Michal)
- Code to prepare to support more engines for Icelake
- Icelake interrupt handling code

- Avoid a race between request submission and marking GPU wedged (Chris)
- OA race condition fix (Lionel)

- Usual code restructuring (Chris, Maarten, Sagar, Ville)

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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2018-02-21 18:02 Joonas Lahtinen
  0 siblings, 0 replies; 123+ messages in thread
From: Joonas Lahtinen @ 2018-02-21 18:02 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

Mostly fixes in this tag. QA/testing could emphasis on CNL hardware as we're
removing the alpha_support flag for it.

Regards, Joonas
---
The following changes tagged drm-intel-testing-2018-02-21:

drm-intel-next-2018-02-21:

Driver Changes:

- Lift alpha_support protection from Cannonlake (Rodrigo)
	* Meaning the driver should mostly work for the hardware we had
	  at our disposal when testing
	* Used to be preliminary_hw_support
- Add missing Cannonlake PCI device ID of 0x5A4C (Rodrigo)
- Cannonlake port register fix (Mahesh)

- Fix Dell Venue 8 Pro black screen after modeset (Hans)
- Fix for always returning zero out-fence from execbuf (Daniele)
- Fix HDMI audio when no no relevant video output is active (Jani)
- Fix memleak of VBT data on driver_unload (Hans)

- Fix for KASAN found locking issue (Maarten)
- RCU barrier consolidation to improve igt/gem_sync/idle (Chris)
- Optimizations to IRQ handlers (Chris)
- vblank tracking improvements (64-bit resolution, PM) (Dhinakaran)
- Pipe select bit corrections (Ville)
- Reduce runtime computed device_info fields (Chris)
- Tune down some WARN_ONs to GEM_BUG_ON now that CI has good coverage (Chris)
- A bunch of kerneldoc warning fixes (Chris)

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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2018-02-07  8:58 Joonas Lahtinen
  0 siblings, 0 replies; 123+ messages in thread
From: Joonas Lahtinen @ 2018-02-07  8:58 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

CI has been really effective in catching problems before users have reported
them to us. All Bugzilla from this tag are from our CI! We can pat ourselves
on the shoulder.

Due to FOSDEM prep and travel, there's quite a hunk of patches, I've tried
to highlight the ones with most testing impact on the top.

Regards, Joonas
---
The following changes tagged drm-intel-testing-2018-02-07:

UAPI Changes:

- Userspace whitelist register GEN9_SLICE_COMMON_ECO_CHICKEN1 for GLK (Kenneth)
- Non-existent PMU counters are not placed to sysfs (Tvrtko)
- Add a note to deprecate I915_SET_COLORKEY_NONE and ignore it (Ville)
    * Intel DDX never ended using it, and implementation was wonky

Core Changes:

- Moved away from struct timeval into ktime_t in prep for 2038 (Arnd)
    * Merged the i915 portion through drm-tip, no core dependencies

Driver Changes:

- Base support for Icelake and Icelake PCH (Anusha, Rodrigo, Mahesh, Paulo, James, Kelvin)
- Add AUX-F port support for Cannonlake (Rodrigo)
- New DMC firmware for 1.07 Cannonlake (Anusha)
    * Go to linux-firmware.git to get it
- Reject non-cursor planes nearly (3 px) out of screen on GLK/CNL (Imre)
- Y/Yf modifiers restored for SKL+ sprites (Ville)
- Compressed framebuffer support for sprites (Ville)
- Tune down overly aggressive shrinking (Chris)
- Shrink kmem caches when GPU is idle (Chris)
- EDID bit-banging fallback for HDMI EDID (Stefan)
- Don't boost the GPU when the waited request is already running (Chris)
- Avoid GLK/BXT CDCLK frequency locking timeouts (Imre)
- Limit DP link rate according to VBT on CNL+ (Jani)
- Skip post-reset request emission if the engine is not idle (Chris)
- Report any link training error on a fixed eDP panel as errors (Manasi)
- DSI panel fixes for Bay Trail (Hans)
- Selftest additions and improvements (Chris, Matt)
- DMA fence test additions and accompanying fixes (Chris)
- Power domain vs. register access fix (Maarten)
- Squelch warnings for people with teensy framebuffers (stride < 512) (Maarten)
- Increase Render/Media power gating hysteresis for Gen9+ (Chris)
- HDMI vswing display workaround for Gen9+ (Ville)
- GuC code cleanup and lockdep fixes (Sagar, Michal Wa.)
- Continuously run hangcheck for simplicity (Chris)
- Execlist debugging improvements (Chris)
- GuC debugging improvements (Sujaritha, Michal Wa., Sagar)
- Command parser boundary checks (Michal Srb)
- Add a workaround for 3DSTATE_SAMPLE_PATTERN on CNL (Rafael)
- Fix PMU enabling race condition (Tvrtko)
- Usual smaller testing and debugging improvements

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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-12-22 20:57 Rodrigo Vivi
  0 siblings, 0 replies; 123+ messages in thread
From: Rodrigo Vivi @ 2017-12-22 20:57 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

This is the last one for 4.16.

The following changes tagged drm-intel-testing-2017-12-22:

Since I intend to immediately propagate that to Dave,
For the reference on testing, this was tested with CI
on https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3570/

drm-intel-next-2017-12-22:
- Allow internal page allocation to fail (Chris)
- More improvements on logs, dumps, and trace (Chris, Michal)
- Coffee Lake important fix for stolen memory (Lucas)
- Continue to make GPU reset more robust as well
   improving selftest coverage for it (Chris)
- Unifying debugfs return codes (Michal)
- Using existing helper for testing obj pages (Matthew)
- Organize and improve gem_request tracepoints (Lionel)
- Protect DDI port to DPLL map from theoretical race (Rodrigo)
- ... and consequently fixing the indentation on this DDI clk selection function (Chris)
- ... and consequently properly serializing non-blocking modesets (Ville)
- Add support for horizontal plane flipping on Cannonlake (Joonas)
- Two Cannonlake Workarounds for better stability (Rafael)
- Fix mess around PSR registers (DK)
- More Coffee Lake PCI IDs (Rodrigo)
- Remove CSS modifiers on pipe C of Geminilake (Krisman)
- Disable all planes for load detection (Ville)
- Reorg on i915 display headers (Michal)
- Avoid enabling movntdqa optimization on hypervisor guest (Changbin)

GVT:
- more mmio switch optimization (Weinan)
- cleanup i915_reg_t vs. offset usage (Zhenyu)
- move write protect handler out of mmio handler (Zhenyu)

Thanks,
Rodrigo.

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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-12-14 20:14 Rodrigo Vivi
  0 siblings, 0 replies; 123+ messages in thread
From: Rodrigo Vivi @ 2017-12-14 20:14 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

The following changes tagged drm-intel-testing-2017-12-14:

drm-intel-next-2017-12-14:

- Fix documentation build issues (Randy, Markus)
- Fix timestamp frequency calculation for perf on CNL (Lionel)
- New DMC firmware for Skylake (Anusha)
- GTT flush fixes and other GGTT write track and refactors (Chris)
- Taint kernel when GPU reset fails (Chris)
- Display workarounds organization (Lucas)
- GuC and HuC initialization clean-up and fixes (Michal)
- Other fixes around GuC submission (Michal)
- Execlist clean-ups like caching ELSP reg offset and improving log readability (Chri\
s)
- Many other improvements on our logs and dumps (Chris)
- Restore GT performance in headless mode with DMC loaded (Tvrtko)
- Stop updating legacy fb parameters since FBC is not using anymore (Daniel)
- More selftest improvements (Chris)
- Preemption fixes and improvements (Chris)
- x86/early-quirks improvements for Intel graphics stolen memory. (Joonas, Matthew)
- Other improvements on Stolen Memory code to be resource centric. (Matthew)
- Improvements and fixes on fence allocation/release (Chris).

GVT:

- fixes for two coverity scan errors (Colin)
- mmio switch code refine (Changbin)
- more virtual display dmabuf fixes (Tina/Gustavo)
- misc cleanups (Pei)
- VFIO mdev display dmabuf interface and gvt support (Tina)
- VFIO mdev opregion support/fixes (Tina/Xiong/Chris)
- workload scheduling optimization (Changbin)
- preemption fix and temporal workaround (Zhenyu)
- and misc fixes after refactor (Chris)

Thanks,
Rodrigo.
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-12-02  1:09 Rodrigo Vivi
  0 siblings, 0 replies; 123+ messages in thread
From: Rodrigo Vivi @ 2017-12-02  1:09 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

The following changes tagged drm-intel-testing-2017-12-01:

drm-intel-next-2017-12-01:

- Init clock gate fix (Ville)
- Execlists event handling corrections (Chris, Michel)
- Improvements on GPU Cache invalidation and context switch (Chris)
- More perf OA changes (Lionel)
- More selftests improvements and fixes (Chris, Matthew)
- Clean-up on modules parameters (Chris)
- Clean-up around old ringbuffer submission and hw semaphore on old platforms (Chris)
- More Cannonlake stabilization effort (David, James)
- Display planes clean-up and improvements (Ville)
- New PMU interface for perf queries... (Tvrtko)
- ... and other subsequent PMU changes and fixes (Tvrtko, Chris)
- Remove success dmesg noise from rotation (Chris)
- New DMC for Kabylake (Anusha)
- Fixes around atomic commits (Daniel)
- GuC updates and fixes (Sagar, Michal, Chris)
- Couple gmbus/i2c fixes (Ville)
- Use exponential backoff for all our wait_for() (Chris)
- Fixes for i915/fbdev (Chris)
- Backlight fixes (Arnd)
- Updates on shrinker (Chris)
- Make Hotplug enable more robuts (Chris)
- Disable huge pages (TPH) on lack of a needed workaround (Joonas)
- New GuC images for SKL, KBL, BXT (Sagar)
- Add HW Workaround for Geminilake performance (Valtteri)
- Fixes for PPS timings (Imre)
- More IPS fixes (Maarten)
- Many fixes for Display Port on gen2-gen4 (Ville)
- Retry GPU reset making the recover from hang more robust (Chris)

Thanks,
Rodrigo.
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-11-17 22:48 Rodrigo Vivi
  0 siblings, 0 replies; 123+ messages in thread
From: Rodrigo Vivi @ 2017-11-17 22:48 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

The following changes tagged drm-intel-testing-2017-11-17-2:

drm-intel-next-2017-11-17-1:

More change sets for 4.16:

- Many improvements for selftests and other igt tests (Chris)
- Forcewake with PUNIT->PMIC bus fixes and robustness (Hans)
- Define an engine class for uABI (Tvrtko)
- Context switch fixes and improvements (Chris)
- GT powersavings and power gating simplification and fixes (Chris)
- Other general driver clean-ups (Chris, Lucas, Ville)
- Removing old, useless and/or bad workarounds (Chris, Oscar, Radhakrishna)
- IPS, pipe config, etc in preparation for another Fast Boot attempt (Maarten)
- OA perf fixes and support to Coffee Lake and Cannonlake (Lionel)
- Fixes around GPU fault registers (Michel)
- GEM Proxy (Tina)
- Refactor of Geminilake and Cannonlake plane color handling (James)
- Generalize transcoder loop (Mika Kahola)
- New HW Workaround for Cannonlake and Geminilake (Rodrigo)
- Resume GuC before using GEM (Chris)
- Stolen Memory handling improvements (Ville)
- Initialize entry in PPAT for older compilers (Chris)
- Other fixes and robustness improvements on execbuf (Chris)
- Improve logs of GEM_BUG_ON (Mika Kuoppala)
- Rework with massive rename of GuC functions and files (Sagar)
- Don't sanitize frame start delay if pipe is off (Ville)
- Cannonlake clock fixes (Rodrigo)
- Cannonlake HDMI 2.0 support (Rodrigo)
- Add a GuC doorbells selftest (Michel)
- Add might_sleep() check to our wait_for() (Chris)

Many GVT changes for 4.16:

- CSB HWSP update support (Weinan)
- GVT debug helpers, dyndbg and debugfs (Chuanxiao, Shuo)
- full virtualized opregion (Xiaolin)
- VM health check for sane fallback (Fred)
- workload submission code refactor for future enabling (Zhi)
- Updated repo URL in MAINTAINERS (Zhenyu)
- other many misc fixes

Thanks,
Rodrigo.
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-11-10 18:36 Rodrigo Vivi
  0 siblings, 0 replies; 123+ messages in thread
From: Rodrigo Vivi @ 2017-11-10 18:36 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: Jani Nikula, intel-gfx

Hi all,

The following changes tagged drm-intel-testing-2017-11-09:

Getting started with v4.16 features:

- Cannonlake Enabling (Anusha, Rodrigo, Ville, Michel, Mika Kahola, Rafael)
- Disable lazy PPGTT page table optimization for vGPU (Joonas)
- Preemption with GuC (Michal Winiarsk, Jeff, Michel)
- Other GuC and HuC related fixes and improvements (Michal Winiarsk)
- HuC use helper function while waiting for DMA completion (Michal Wajdeczko)
- Cancel modeset retry work during cleanup (Manasi)
- Improvements on ILK watermarks (Maarten)
- eDP fixes and clean-up (Jani)
- Nuke dig_port->port and assorted cleanups (Ville)
- Pass around crtc and connector states for audio (Ville)
- Forcewake fallback (Mika Kuoppala)
- Perf OA fixes (Lionel)
- Reject unknown syncobj flags (Tvrtko)
- Warn in debug builds of incorrect usages of ptr_pack_bits (Tvrtko)
- Move init_clock_gating back where it was (Ville)
- Finally, numerous GEM fixes, cleanups and improvements (Chris)

Thanks,
Rodrigo.
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-10-23 10:03 Jani Nikula
  0 siblings, 0 replies; 123+ messages in thread
From: Jani Nikula @ 2017-10-23 10:03 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

The following changes tagged drm-intel-testing-2017-10-23:

drm-intel-next-2017-10-23:
This time really the last i915 batch for v4.15:

- PSR state tracking in crtc state (Ville)
- Fix eviction when the GGTT is idle but full (Chris)
- BDW DP aux channel timeout fix (James)
- LSPCON detection fixes (Shashank)
- Use for_each_pipe to iterate over pipes (Mika Kahola)
- Replace *_reference/unreference() or *_ref/unref with _get/put() (Harsha)
- Refactoring and preparation for DDI encoder type cleanup (Ville)
- Broadwell DDI FDI buf translation fix (Chris)
- Read CSB and CSB write pointer from HWSP in GVT-g VM if available (Weinan)
- GuC/HuC firmware loader refactoring (Michal)
- Make shrinking more effective and not stall so much (Chris)
- Cannonlake PLL fixes (Rodrigo)
- DP MST connector error propagation fixes (James)
- Convert timers to use timer_setup (Kees Cook)
- Skylake plane enable/disable unification (Juha-Pekka)
- Fix to actually free driver internal objects when requested (Chris)
- DDI buf trans refactoring (Ville)
- Skip waking the device to service pwrite (Chris)
- Improve DSI VBT backlight parsing abstraction (Madhav)
- Cannonlake VBT DDC pin mapping fix (Rodrigo)

BR,
Jani.


-- 
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-10-12 19:03 Jani Nikula
  0 siblings, 0 replies; 123+ messages in thread
From: Jani Nikula @ 2017-10-12 19:03 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

The following changes tagged drm-intel-testing-2017-10-12, and a low
point in any changelogs I've written. Apologies in advance.

drm-intel-next-2017-10-12:
Last batch of drm/i915 features for v4.15:

- transparent huge pages support (Matthew)
- uapi: I915_PARAM_HAS_SCHEDULER into a capability bitmask (Chris)
- execlists: preemption (Chris)
- scheduler: user defined priorities (Chris)
- execlists optimization (Michał)
- plenty of display fixes (Imre)
- has_ipc fix (Rodrigo)
- platform features definition refactoring (Rodrigo)
- legacy cursor update fix (Maarten)
- fix vblank waits for cursor updates (Maarten)
- reprogram dmc firmware on resume, dmc state fix (Imre)
- remove use_mmio_flip module parameter (Maarten)
- wa fixes (Oscar)
- huc/guc firmware refacoring (Sagar, Michal)
- push encoder specific code to encoder hooks (Jani)
- DP MST fixes (Dhinakaran)
- eDP power sequencing fixes (Manasi)
- selftest updates (Chris, Matthew)
- mmu notifier cpu hotplug deadlock fix (Daniel)
- more VBT parser refactoring (Jani)
- max pipe refactoring (Mika Kahola)
- rc6/rps refactoring and separation (Sagar)
- userptr lockdep fix (Chris)
- tracepoint fixes and defunct tracepoint removal (Chris)
- use rcu instead of abusing stop_machine (Daniel)
- plenty of other fixes all around (Everyone)

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-09-29 11:38 Jani Nikula
  0 siblings, 0 replies; 123+ messages in thread
From: Jani Nikula @ 2017-09-29 11:38 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: intel-gfx, Rodrigo Vivi

Hi all,

The following changes tagged drm-intel-testing-2017-09-29:

2nd batch of v4.15 features:

- lib/scatterlist updates, use for userptr allocations (Tvrtko)
- Fixed point wrapper cleanup (Mahesh)
- Gen9+ transition watermarks, watermark optimization and fixes (Mahesh)
- Display IPC (Isochronous Priority Control) support (Mahesh)
- GEM workaround fixes (Oscar)
- GVT: PCI config sanitize series (Changbin)
- GVT: Workload submission error handling series (Fred)
- PSR fixes and refactoring (Rodrigo)
- HWSP based optimizations (Chris)
- Private PAT management (Zhi)
- IRQ handling fixes and refactoring (Ville)
- Module parameter refactoring and variable name clash fix (Michal)
- Execlist refactoring, incomplete request unwinding on reset (Chris)
- GuC scheduling improvements (Michal)
- OA updates (Lionel)
- Coffeelake out of alpha support (Rodrigo)
- seqno fixes (Chris)
- Execlist refactoring (Mika)
- DP and DP MST cleanups (Dhinakaran)
- Cannonlake slice/sublice config (Ben)
- Numerous fixes all around (Everyone)

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-09-07 12:03 Jani Nikula
  0 siblings, 0 replies; 123+ messages in thread
From: Jani Nikula @ 2017-09-07 12:03 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: Daniel Vetter, intel-gfx


Hi all,

Getting started with v4.15 features:

- Cannonlake workarounds (Rodrigo, Oscar)
- Infoframe refactoring and fixes to enable infoframes for DP (Ville)
- VBT definition updates (Jani)
- Sparse warning fixes (Ville, Chris)
- Crtc state usage fixes and cleanups (Ville)
- DP vswing, pre-emph and buffer translation refactoring and fixes (Rodrigo)
- Prevent IPS from interfering with CRC capture (Ville, Marta)
- Enable Mesa to advertise ARB_timer_query (Nanley)
- Refactor GT number into intel_device_info (Lionel)
- Avoid eDP DP AUX CH timeouts harder (Manasi)
- CDCLK check improvements (Ville)
- Restore GPU clock boost on missed pageflip vblanks (Chris)
- Fence register reservation API for vGPU (Changbin)
- First batch of CCS fixes (Ville)
- Finally, numerous GEM fixes, cleanups and improvements (Chris)

BR,
Jani.

-- 
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_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-08-21 15:28 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-08-21 15:28 UTC (permalink / raw)
  To: Jari Tahvanainen; +Cc: Daniel Vetter, intel-gfx

Hi all,

Final pile of features for 4.14

- New ioctl to change NOA configurations, plus prep (Lionel)
- CCS (color compression) scanout support, based on the fancy new
  modifier additions (Ville&Ben)
- Document i915 register macro style (Jani)
- Many more gen10/cnl patches (Rodrigo, Pualo, ...)
- More gpu reset vs. modeset duct-tape to restore the old way.
- prep work for cnl: hpd_pin reorg (Rodrigo), support for more power
  wells (Imre), i2c pin reorg (Anusha)
- drm_syncobj support (Jason Ekstrand)
- forcewake vs gpu reset fix (Chris)
- execbuf speedup for the no-relocs fastpath, anv/vk low-overhead ftw (Chris)
- switch to idr/radixtree instead of the resizing ht for execbuf id->vma
  lookups (Chris)

gvt:
- MMIO save/restore optimization (Changbin)
- Split workload scan vs. dispatch for more parallel exec (Ping)
- vGPU full 48bit ppgtt support (Joonas, Tina)
- vGPU hw id expose for perf (Zhenyu)

Bunch of work all over to make the igt CI runs more complete/stable.
Watch https://intel-gfx-ci.01.org/tree/drm-tip/shards-all.html for
progress in getting this ready. Next week we're going into production
mode (i.e. will send results to intel-gfx) on hsw, more platforms to
come.

Also, a new maintainer tram, I'm stepping out. Huge thanks to Jani for
being an awesome co-maintainer the past few years, and all the best
for Jani, Joonas&Rodrigo as the new maintainers!

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-07-31  8:18 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-07-31  8:18 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

More 4.14 work:

- tons of corner-case fixes for gpu reset/recovery (Chris Wilson)
- refactor power-well code for future platforms (Imre)
- Ycbcr420 support for hdmi 2.0 displays (Shashank Sharma)
- document FBC structs (Paulo Zanoni)
- reduce struct_mutex usage in pinning (Chris Wilson)
- small bits all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-07-17  7:28 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-07-17  7:28 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

2nd round of 4.14 features:

- prep for deferred fbdev setup
- refactor fixed 16.16 computations and skl+ wm code (Mahesh Kumar)
- more cnl paches (Rodrigo, Imre et al)
- tighten context cleanup and handling (Chris Wilson)
- fix interlaced handling on skl+ (Mahesh Kumar)
- small bits as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-07-03  6:58 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-07-03  6:58 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

First pile for 4.14:

- cnl fixes (Rodrigo, Manasi)
- per-engine reset support aka TDR (Michel Thierry)
- dynamic DPCD backlight support (Puthikorn Voravootivat)
- prep for huge gpu pages (Matthew Auld)
- make contexts less BKL dependent (Chris)
- bunch of execlist/gem corner-cases fixes and locking down
  self-checks (Chris)
- fix waitboost accounting when using fence waits (Chris)
- clean up PCH detection/handling (Ville)
- usual pile of small fixes and cleanups

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-06-19  7:44 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-06-19  7:44 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

Final pile of features for 4.13

New uabi:
- batch bo in first slot, for faster execbuf assembly in userspace
  (Chris Wilson)
- (sub)slice getparam, needed for mesa perf support (Robert Bragg)

First pile of patches for cnl/cfl support, maintained by Rodrigo but
with lots of contributions from others. Still incomplete since public
review still ongoing.

Features/refactoring:
- Make execbuf faster (Chris Wilson), a pile of series to make execbuf
  buffer handling have fewer passes, use less list walking, postpone
  more work to async workers and shuffle buffers less, all to make the
  common case much faster (in some cases at least).
- cold boot support for glk dsi (Madhav Chauhan)
- Clean up pipe A quirk and related old platform hacks (Ville)
- perf sampling support for kbl/glk (Lionel)
- perf cleanups (Robert Bragg)
- wire atomic state to backlight code, to avoid pipe lookup hacks
  (Maarten)
- reduce request waiting latency/overhead to remove the spinning and
  associated cpu cycle wasting (Chris)
- fix 90/270 rotation wm computation (Ville)
- new ddb allocation algo for skl (Kumar Mahesh)
- fix regression due to system suspend optimiazatino (Imre)
- the usual pile of small cleanups and refactors all over

GVT updates contained in this tag:
- optimization for per-VM mmio save/restore (Changbin)
- optimization for mmio hash table (Changbin)
- scheduler optimization with event (Ping)
- vGPU reset refinement (Fred)
- other misc refactor and cleanups, etc.

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-05-29 13:14 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-05-29 13:14 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

More stuff for 4.13:

- skl+ wm fixes from Mahesh Kumar
- some refactor and tests for i915_sw_fence (Chris)
- tune execlist/scheduler code (Chris)
- g4x,g33 gpu reset improvements (Chris, Mika)
- guc code cleanup (Michal Wajdeczko, Michał Winiarski)
- dp aux backlight improvements (Puthikorn Voravootivat)
- buffer based guc/host communication (Michal Wajdeczko)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-05-15  7:55 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-05-15  7:55 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

Another pile of stuff for 4.12:

- OA improvements and fixes from Robert Bragg
- fixes for the dp aux backlight driver (Puthikorn Voravootivat)
- no RCU during shrinking (unfortunately), from Joonas
- small atomic leftovers (better unpin, statified hw verifier), from
  Maarten
- g4x wm fixes (Ville)
- piles of cursor fixes/improvements (Ville)
- g4x overlay plane support (Ville)
- prep for new guc logging/notification (Michal Wajdeczko)
- pile of static checker appeasement from Imre
- implement dma_buf->kmap, good for testing (Chris)
- fine-tune ring handling (Chris)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-05-02  7:34 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-05-02  7:34 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

Somehow not much these 2 weeks ...

- (hopefully) stability fixes for byt/bsw gt wake (Chris)
- tighten up requests (especially restarts) checks and debug tracking
  (Chris)
- unify context handling more for gen5+ (Chris+Joonas)
- oddball bugfixes as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-04-18  9:36 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-04-18  9:36 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

First slice of 4.13 features:

new uabi:
- extend error state dumping to include non-batch buffers requested by
  userspace (Chris), so that mesa gets more useful error state dumps
- reapply the link status patch, for handlig dp link failures
  (Manasi). This needs updated -modesetting to work correctly.
- Add new _WC cache domain, our assumption that wc can be subsumed by
  the existing cache domains didn't pan out (Chris)

feature work:
- first pile of conversion to atomic properties for connectors
  (Maarten)
- refactor dp link rate handling code and related areas (Jani)
- split engine info into class and runtime stuff (Oscar Mateo)
- more robust wait_for_register code (Chris, Michal Wajdeczko)
- fix rcu issues in the shrinker and simplify locking (Joonas)
- guc/huc for glk (Anusha)
- enable atomic modesetting for vlv/chv (Ville), plus final fixes for
  that

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-04-03  6:05 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-04-03  6:05 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

Last 4.12 feature pile:

GVT updates:
- Add mdev attribute group for per-vgpu info
- Time slice based vGPU scheduling QoS support (Gao Ping)
- Initial KBL support for E3 server (Han Xu)
- other misc.

i915:
- lots and lots of small fixes and improvements all over
- refactor fw_domain code (Chris Wilson)
- improve guc code (Oscar Mateo)
- refactor cursor/sprite code, precompute more for less overhead in
  the critical path (Ville)
- refactor guc/huc fw loading code a bit (Michal Wajdeczko)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-03-20  7:37 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-03-20  7:37 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

More in i915 for 4.12:

- designware i2c fixes from Hans de Goede, in a topic branch shared
  with other subsystems (maybe, they didn't confirm, but requested the
  pull)
- drop drm_panel usage from the intel dsi vbt panel (Jani)
- vblank evasion improvements and tracing (Maarten and Ville)
- clarify spinlock irq semantics again a bit (Tvrtko)
- new ->pwrite backend hook (right now just for shmem pageche writes),
  from Chris
- more planar/ccs work from Ville
- hotplug safe connector iterators everywhere
- userptr fixes (Chris)
- selftests for cache coloring eviction (Matthew Auld)
- extend debugfs drop_caches interface for shrinker testing (Chris)
- baytrail "the rps kills the machine" fix (Chris)
- use new atomic state iterators, a lot (Maarten)
- refactor guc/huc code some (Arkadiusz Hiler)
- tighten breadcrumbs rbtree a bit (Chris)
- improve wrap-around and time handling in rps residency counters
  (Mika)
- split reset-in-progress in two flags, backoff and handoff (Chris)
- other misc reset improvements from a few people
- bunch of vgpu interaction fixes with recent code changes
- misc stuff all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-03-06  9:43 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-03-06  9:43 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

4 weeks worth of stuff since I was traveling&lazy:

- lspcon improvements (Imre)
- proper atomic state for cdclk handling (Ville)
- gpu reset improvements (Chris)
- lots and lots of polish around fences, requests, waiting and
  everything related all over (both gem and modeset code), from Chris
- atomic by default on gen5+ minus byt/bsw (Maarten did the patch to
  flip the default, really this is a massive joint team effort)
- moar power domains, now 64bit (Ander)
- big pile of in-kernel unit tests for various gem subsystems (Chris),
  including simple mock objects for i915 device and and the ggtt
  manager.
- i915_gpu_info in debugfs, for taking a snapshot of the current gpu
  state. Same thing as i915_error_state, but useful if the kernel didn't
  notice something is stick. From Chris.
- bxt dsi fixes (Umar Shankar)
- bxt w/a updates (Jani)
- no more struct_mutex for gem object unreference (Chris)
- some execlist refactoring (Tvrtko)
- color manager support for glk (Ander)
- improve the power-well sync code to better take over from the
  firmware (Imre)
- gem tracepoint polish (Tvrtko)
- lots of glk fixes all around (Ander)
- ctx switch improvements (Chris)
- glk dsi support&fixes (Deepak M)
- dsi fixes for vlv and clanups, lots of them (Hans de Goede)
- switch to i915.ko types in lots of our internal modeset code (Ander)
- byt/bsw atomic wm update code, yay (Ville)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-02-06  9:41 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-02-06  9:41 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

First feature pile for 4.12:

- use atomic_commit for legay page flips, once more! (from Maarten)
- piles and piles of fixes and patches to make corner-cases more
  robust in atomic code, execlist, gem, from lots of different folks
- remove pre-production w/a for bxt (Chris)
- taint the kernel on pre-production hw that's no longer supported
  (Chris)
- consistently treat stolen as dma_addr_t (Chris)
- vgpu forcewake cleanup (Weinan Li)
- glk color manager support (Ander)
- explicit fencing support in execbuf, for Android! (Chris)
- ... plus the remaining prep-work for the same (also Chris)
- dp compliance prep (Manasi and Jani)
- cleanup skl/kbl code under IS_GEN9_BC (for "big core"), from Rodrigo

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-01-23  7:36 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-01-23  7:36 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

Final block of feature work for 4.11:

- gen8 pd cleanup from Matthew Auld
- more cleanups for view/vma (Chris)
- dmc support on glk (Anusha Srivatsa)
- use core crc api (Tomue)
- track wedged requests using fence.error (Chris)
- lots of psr fixes (Nagaraju, Vathsala)
- dp mst support, acked for merging through drm-intel by Takashi
  (Libin)
- huc loading support, including uapi for libva to use it (Anusha
  Srivatsa)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2017-01-09  9:16 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2017-01-09  9:16 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

More 4.11 stuff, holidays edition (i.e. not much):

- docs and cleanups for shared dpll code (Ander)
- some kerneldoc work (Chris)
- fbc by default on gen9+ too, yeah! (Paulo)
- fixes, polish and other small things all over gem code (Chris)
- and a few small things on top

Plus a backmerge, because Dave was enjoying time off too.

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-12-26 16:09 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-12-26 16:09 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

2nd round of stuff for 4.11:

- DP link rate fixes (DK)
- prep work for atomic wm updates on vlv/chv (Ville)
- platform enumeration cleanup (Jani)
- dsi fixes and cleaups (Hans de Goede)
- gen9 wm fixes (Mahesh Kumar)
- prep work for DP link failure fallback handling (Manasi)
- introduce GEM_WARN_ON (Matthew Auld)
- overlay fixes and cleanups (Ville)
- make is_lp apply to all modern/gen7+ atom-based platforms (Rodrigo)

Tons of small polish, fixes and cleanups all over. This time around
this is about half the patches!

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Re: Updated drm-intel-testing
  2016-12-05  8:41 ` Daniel Vetter
@ 2016-12-05  8:51   ` Argotti, Yann
  0 siblings, 0 replies; 123+ messages in thread
From: Argotti, Yann @ 2016-12-05  8:51 UTC (permalink / raw)
  To: Daniel Vetter, Prigent, Christophe, Dumez, Julian
  Cc: Daniel Vetter, intel-gfx

> Subject: Re: [Intel-gfx] Updated drm-intel-testing
> 
> On Mon, Dec 05, 2016 at 09:40:25AM +0100, Daniel Vetter wrote:
> > Hi all,
> >
> > New -testing cycle with cool stuff:
> > First round of stuff for 4.10!
> 
> ofc this should have been 4.11 ...
> -Daniel

Thanks Daniel!
with Julian we are refining current QA process to have some acceptance criteria in place to accept a version (ie commit id/HEAD) before tagging as testing or QA tag and then proceeding in further validation cycle for the rest of the week.
Cheers,
Yann

> 
> >
> > - refactor hangcheck/ban/reset stats code in prep for TDR (Mika)
> > - much more fancy perf monitoring support (Robert Bragg)
> > - lspcon fixes (Imre)
> > - rework plane ids to unconfuse the code (Ville)
> > - fix up cdclck/atomic state handling (Ville)
> > - debugobjects support for i915 fences (Chris)
> > - guc code cleanup (Arkadiusz Hiler)
> > - dp mst enabling, one more attempt (Libin)
> > - bugfixes for request resubmission after hangs (Chris)
> > - add basic geminilake support (Ander)
> > - switch more internal functions from drm_device to dev_priv (Tvrtko)
> >
> > Happy testing!
> >
> > Cheers, Daniel
> >
> > --
> > Daniel Vetter
> > Software Engineer, Intel Corporation
> > http://blog.ffwll.ch
> 
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Re: Updated drm-intel-testing
  2016-12-05  8:40 Daniel Vetter
@ 2016-12-05  8:41 ` Daniel Vetter
  2016-12-05  8:51   ` Argotti, Yann
  0 siblings, 1 reply; 123+ messages in thread
From: Daniel Vetter @ 2016-12-05  8:41 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

On Mon, Dec 05, 2016 at 09:40:25AM +0100, Daniel Vetter wrote:
> Hi all,
> 
> New -testing cycle with cool stuff:
> First round of stuff for 4.10!

ofc this should have been 4.11 ...
-Daniel

> 
> - refactor hangcheck/ban/reset stats code in prep for TDR (Mika)
> - much more fancy perf monitoring support (Robert Bragg)
> - lspcon fixes (Imre)
> - rework plane ids to unconfuse the code (Ville)
> - fix up cdclck/atomic state handling (Ville)
> - debugobjects support for i915 fences (Chris)
> - guc code cleanup (Arkadiusz Hiler)
> - dp mst enabling, one more attempt (Libin)
> - bugfixes for request resubmission after hangs (Chris)
> - add basic geminilake support (Ander)
> - switch more internal functions from drm_device to dev_priv (Tvrtko)
> 
> Happy testing!
> 
> Cheers, Daniel
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-12-05  8:40 Daniel Vetter
  2016-12-05  8:41 ` Daniel Vetter
  0 siblings, 1 reply; 123+ messages in thread
From: Daniel Vetter @ 2016-12-05  8:40 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
First round of stuff for 4.10!

- refactor hangcheck/ban/reset stats code in prep for TDR (Mika)
- much more fancy perf monitoring support (Robert Bragg)
- lspcon fixes (Imre)
- rework plane ids to unconfuse the code (Ville)
- fix up cdclck/atomic state handling (Ville)
- debugobjects support for i915 fences (Chris)
- guc code cleanup (Arkadiusz Hiler)
- dp mst enabling, one more attempt (Libin)
- bugfixes for request resubmission after hangs (Chris)
- add basic geminilake support (Ander)
- switch more internal functions from drm_device to dev_priv (Tvrtko)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-11-21  9:41 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-11-21  9:41 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
Final 4.10 updates:

- fine-tune fb flushing and tracking (Chris Wilson)
- refactor state check dumper code for more conciseness (Tvrtko)
- roll out dev_priv all over the place (Tvrkto)
- finally remove __i915__ magic macro (Tvrtko)
- more gvt bugfixes (Zhenyu&team)
- better opregion CADL handling (Jani)
- refactor/clean up wm programming (Maarten)
- gpu scheduler + priority boosting for flips as first user (Chris
  Wilson)
- make fbc use more atomic (Paulo)
- initial kvm-gvt framework, but not yet complete (Zhenyu&team)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-11-08  7:13 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-11-08  7:13 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- gpu idling rework for s/r (Imre)
- vlv mappable scanout fix
- speed up probing in resume (Lyude)
- dp audio workarounds for gen9 (Dhinakaran)
- more conversion to using dev_priv internally (Ville)
- more gen9+ wm fixes and cleanups (Maarten)
- shrinker cleanup&fixes (Chris)
- reorg plane init code (Ville)
- implement support for multiple timelines (prep work for scheduler)
  from Chris and all
- untangle dev->struct_mutex locking as prep for multiple timelines
  (Chris)
- refactor bxt phy code and collect it all in intel_dpio_phy.c (Ander)
- another gvt with bugfixes all over from Zhenyu
- piles of lspcon fixes from Imre
- 90/270 rotation fixes (Ville)
- guc log buffer support (Akash+Sagar)
- fbc fixes from Paulo
- untangle rpm vs. tiling-fences/mmaps (Chris)
- fix atomic commit to wait on the right fences (Daniel Stone)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-10-24  6:28 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-10-24  6:28 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- first slice of the gvt device model (Zhenyu et al)
- compression support for gpu error states (Chris)
- sunset clause on gpu errors resulting in dmesg noise telling users
  how to report them
- .rodata diet from Tvrtko
- switch over lots of macros to only take dev_priv (Tvrtko)
- underrun suppression for dp link training (Ville)
- lspcon (hmdi 2.0 on skl/bxt) support from Shashank Sharma, polish
  from Jani
- gen9 wm fixes from Paulo&Lyude
- updated ddi programming for kbl (Rodrigo)
- respect alternate aux/ddc pins (from vbt) for all ddi ports (Ville)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-10-10  9:11 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-10-10  9:11 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- dsi/backlight fixes (Jani&Shawn)
- a few reset improvements (Ben, Chris, Imre)
- refactor port tracking for audio support (Dhinakaran)
- a pile of gen9 wm fixes from Paulo
- drop skl pre-production w/a (Jani)
- refactor forcewake and shadow reg filters into tables, and unify the
  funcs/macros using them across platforms (Tvrtko)
- fix DP detection to not require an edid (Ville)
- register shadow VGA port (for testing), from Ville

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-09-19  9:13 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-09-19  9:13 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- refactor the sseu code (Imre)
- refine guc dmesg output (Dave Gordon)
- more vgpu work
- more skl wm fixes (Lyude)
- refactor dpll code in prep for upfront link training (Jim Bride et al)
- consolidate all platform feature checks into intel_device_info (Carlos Santa)
- refactor elsp/execlist submission as prep for re-submission after hang
  recovery and eventually scheduling (Chris Wilson)
- allow synchronous gpu reset handling, to remove tricky/impossible/fragile
  error recovery code (Chris Wilson)
- prep work for nonblocking (execlist) submission, using fences to track
  depencies and drive elsp submission (Chris Wilson)
- partial error recover/resubmission of non-guilty batches after hangs (Chris Wilson)
- full dma-buf implicit fencing support (Chris Wilson)
- dp link training fixes (Jim, Dhinkaran, Navare, ...)
- obey dp branch device pixel rate/bpc/clock limits (Mika Kahola), needed for
  many vga dongles
- bunch of small cleanups and polish all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-09-02  6:46 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-09-02  6:46 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- skl wm fixes (Lyude, Matt, Maarten)
- cleanup of kdev/drm_dev/i915_dev handling (David Weinehall)
- make (most) encoders take advantage of atomic states (Maarten)
- MMAP_GTT_VERSION driver param to announce that gtt mmaps are reliable (Chris)
- allow contexts on all rings (Chris)
- a few fixes (around diagnostic messages) to make BAT less noisy
- misc fixes and cleanups all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-08-22  7:21 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-08-22  7:21 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- bugfixes and cleanups for rcu-protected requests (Chris)
- atomic modeset fixes for gpu reset on pre-g4x (Maarten&Ville)
- guc submission improvements (Dave Gordon)
- panel power sequence cleanup (Imre)
- better use of stolen and unmappable ggtt (Chris), plus prep work to make that
  happen
- rework of framebuffer offsets, prep for multi-plane framebuffers (Ville)
- fully partial ggtt vmaps, including fenced ones (Chris)
- move lots more of the gem tracking from the object to the vma (Chris)
- tune the command parser (Chris)
- allow fbc without fences on recent platforms (Chris)
- fbc frontbuffer tracking fixes (Chris)
- fast prefaulting using io-mappping.h pgprot caching (Chris)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-08-08  7:57 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-08-08  7:57 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- refactor ddi buffer programming a bit (Ville)
- large-scale renaming to untangle naming in the gem code (Chris)
- rework vma/active tracking for accurately reaping idle mappings of shared
  objects (Chris)
- misc dp sst/mst probing corner case fixes (Ville)
- tons of cleanup&tunings all around in gem
- lockless (rcu-protected) request lookup, plus use it everywhere for
  non(b)locking waits (Chris)
- pipe crc debugfs fixes (Rodrigo)
- random fixes all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-07-25  6:21 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-07-25  6:21 UTC (permalink / raw)
  To: Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- more engine code unification (Tvrtko)
- reorganize rps&rc6 setup (Chris Wilson)
- hotplug polling when in deep rpm states, especially fixes vls (Lyude)
- mocs fix for bxt (Imre)
- convert i915 request to use dma fences (Chris)
- prep work for lockless i915 requests/fences (needed for full sync integration)
  from Chris Wilson
- wait for external rendering/fences attached to dma_bufs (Chris)
- tons of small bugfixes all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-07-11  7:37 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-07-11  7:37 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- select igt testing depencies for CONFIG_DRM_I915_DEBUG (Chris)
- track outputs in crtc state and clean up all our ad-hoc connector/encoder
  walking in modest code (Ville)
- demidlayer drm_device/drm_i915_private (Chris Wilson)
- thundering herd fix from Chris Wilson, with lots of help from Tvrtko Ursulin
- piles of assorted clean and fallout from the thundering herd fix
- documentation and more tuning for waitboosting (Chris)
- pooled EU support on bxt (Arun Siluvery)
- bxt support is no longer considered prelimary!
- ring/engine vfunc cleanup from Tvrtko
- introduce intel_wait_for_register helper (Chris)
- opregion updates (Jani Nukla)
- tuning and fixes for wait_for macros (Tvrkto&Imre)
- more kabylake pci ids (Rodrigo)
- pps cleanup and fixes for bxt (Imre)
- move sink crc support over to atomic state (Maarten)
- fix up async fbdev init ordering (Chris)
- fbc fixes from Paulo and Chris

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-06-19 22:37 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-06-19 22:37 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- Infrastructure for GVT-g (paravirtualized gpu on gen8+), from Zhi Wang
- another attemp at nonblocking atomic plane updates
- bugfixes and refactoring for GuC doorbell code (Dave Gordon)
- GuC command submission enabled by default, if fw available (Dave Gordon)
- more bxt w/a (Arun Siluvery)
- bxt phy improvements (Imre Deak)
- prep work for stolen objects support (Ankitprasa Sharma & Chris Wilson)
- skl/bkl w/a update from Mika Kuoppala
- bunch of small improvements and fixes all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-06-05 22:39 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-06-05 22:39 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- some polish for the guc code (Dave Gordon)
- big refactoring of gen9 display clock handling code (Ville)
- refactoring work in the context code (Chris Wilson)
- give encoder/crtc/planes useful names for debug output (Ville)
- improvements to skl/kbl wm computation code (Mahesh Kumar)
- bunch of smaller improvements all over as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-05-22 16:31 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-05-22 16:31 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- cmd-parser support for direct reg->reg loads (Ken Graunke)
- better handle DP++ smart dongles (Ville)
- bxt guc fw loading support (Nick Hoathe)
- remove a bunch of struct typedefs from dpll code (Ander)
- tons of small work all over to avoid casting between drm_device and the i915
  dev struct (Tvrtko&Chris)
- untangle request retiring from other operations, also fixes reset stat corner
  cases (Chris)
- skl atomic watermark support from Matt Roper, yay!
- various wm handling bugfixes from Ville
- big pile of cdclck rework for bxt/skl (Ville)
- CABC (Content Adaptive Brigthness Control) for dsi panels (Jani&Deepak M)
- nonblocking atomic commits for plane-only updates (Maarten Lankhorst)
- bunch of PSR fixes&improvements
- untangle our map/pin/sg_iter code a bit (Dave Gordon)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-05-08 16:32 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-05-08 16:32 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- refactor stolen quirks to share code between early quirks and i915 (Joonas)
- refactor gem BO/vma funcstion (Tvrtko&Dave)
- backlight over DPCD support (Yetunde Abedisi)
- more dsi panel sequence support (Jani)
- lots of refactoring around handling iomaps, vma, ring access and related
  topics culmulating in removing the duplicated request tracking in the execlist
  code (Chris & Tvrtko) includes a small patch for core iomapping code
- hw state readout for bxt dsi (Ramalingam C)
- cdclk cleanups (Ville)
- dedupe chv pll code a bit (Ander)
- enable semaphores on gen8+ for legacy submission, to be able to have a direct
  comparison against execlist on the same platform (Chris) Not meant to be used
  for anything else but performance tuning
- lvds border bit hw state checker fix (Jani)
- rpm vs. shrinker/oom-notifier fixes (Praveen Paneri)
- l3 tuning (Imre)
- revert mst dp audio, it's totally non-functional and crash-y (Lyude)
- first official dmc for kbl (Rodrigo)
- and tons of small things all over as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-04-25  8:03 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-04-25  8:03 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- more userptr cornercase fixes from Chris
- clean up and tune forcewake handling (Tvrtko)
- more underrun fixes from Ville, mostly for ilk to appeas CI
- fix unclaimed register warnings on vlv/chv and enable the debug code to catch
  them by default (Ville)
- skl gpu hang fixes for gt3/4 (Mika Kuoppala)
- edram improvements for gen9+ (Mika again)
- clean up gpu reset corner cases (Chris)
- fix ctx/ring machine deaths on snb/ilk (Chris)
- MOCS programming for all engines (Peter Antoine)
- robustify/clean up vlv/chv irq handler (Ville)
- split gen8+ irq handlers into ack/handle phase (Ville)
- tons of bxt rpm fixes (mostly around firmware interactions), from Imre
- hook up panel fitting for dsi panels (Ville)
- more runtime PM fixes all over from Imre
- shrinker polish (Chris)
- more guc fixes from Alex Dai and Dave Gordon
- tons of bugfixes and small polish all over (but with a big focus on bxt)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Re: Updated drm-intel-testing
  2016-04-12  9:21 ` Ville Syrjälä
@ 2016-04-12  9:55   ` Tvrtko Ursulin
  0 siblings, 0 replies; 123+ messages in thread
From: Tvrtko Ursulin @ 2016-04-12  9:55 UTC (permalink / raw)
  To: Ville Syrjälä, Daniel Vetter; +Cc: intel-gfx


On 12/04/16 10:21, Ville Syrjälä wrote:
> On Mon, Apr 11, 2016 at 09:45:11PM +0200, Daniel Vetter wrote:
>> Hi all,
>>
>> New -testing cycle with cool stuff:
>> - make modeset hw state checker atomic aware (Maarten)
>> - close races in gpu stuck detection/seqno reading (Chris)
>> - tons&tons of small improvements from Chris Wilson all over the gem code
>> - more dsi/bxt work from Ramalingam&Jani
>> - macro polish from Joonas
>> - guc fw loading fixes (Arun&Dave)
>> - vmap notifier (acked by Andrew) + i915 support by Chris Wilson
>> - create bottom half for execlist irq processing (Chris Wilson)
>> - vlv/chv pll cleanup (Ville)
>> - rework DP detection, especially sink detection (Shubhangi Shrivastava)
>> - make color manager support fully atomic (Maarten)
>> - avoid livelock on chv in execlist irq handler (Chris)
>
> The chv irq handler change needs to be backed out, or more preferably
> fixed in another way. Currently chv isn't in the best shape due to this.

Could be that the revert is not a big deal since, if the tasklet is 
working fine, the work is not done in the irq handler any longer so the 
even the looping handler will not be causing huge irqoff latencies.

Regards,

Tvrtko
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Re: Updated drm-intel-testing
  2016-04-11 19:45 Daniel Vetter
  2016-04-11 20:26 ` Felix Miata
@ 2016-04-12  9:21 ` Ville Syrjälä
  2016-04-12  9:55   ` Tvrtko Ursulin
  1 sibling, 1 reply; 123+ messages in thread
From: Ville Syrjälä @ 2016-04-12  9:21 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: intel-gfx

On Mon, Apr 11, 2016 at 09:45:11PM +0200, Daniel Vetter wrote:
> Hi all,
> 
> New -testing cycle with cool stuff:
> - make modeset hw state checker atomic aware (Maarten)
> - close races in gpu stuck detection/seqno reading (Chris)
> - tons&tons of small improvements from Chris Wilson all over the gem code
> - more dsi/bxt work from Ramalingam&Jani
> - macro polish from Joonas
> - guc fw loading fixes (Arun&Dave)
> - vmap notifier (acked by Andrew) + i915 support by Chris Wilson
> - create bottom half for execlist irq processing (Chris Wilson)
> - vlv/chv pll cleanup (Ville)
> - rework DP detection, especially sink detection (Shubhangi Shrivastava)
> - make color manager support fully atomic (Maarten)
> - avoid livelock on chv in execlist irq handler (Chris)

The chv irq handler change needs to be backed out, or more preferably
fixed in another way. Currently chv isn't in the best shape due to this.

I'm trying to figure out how it actually fails. My only theory right now
is that if a display interrupt happens just as we've started processing a
GT interrupt, there might not be an edge for the CPU interrupt generation
logic (assuming the input there is an OR of the GT and display
interrupts), so the CPU interrupt won't be re-raised and thus we fail
to process the display interrupt. I'll need to figure out a decent way to
test that theory though. If this is the case, one potential way to fix
it would be to clear VLV_IER around irq processing, as that combined
with the GEN8_MASTER_IRQ disabling should guarantee an edge at the top
level. So it would be similar to the PCH SDE trick we're doing on some
platforms.

One interesting detail I've already noticed is that, unlike gen4, IIR
isn't actually double buffered on VLV/CHV.

-- 
Ville Syrjälä
Intel OTC
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Re: Updated drm-intel-testing
  2016-04-11 19:45 Daniel Vetter
@ 2016-04-11 20:26 ` Felix Miata
  2016-04-12  9:21 ` Ville Syrjälä
  1 sibling, 0 replies; 123+ messages in thread
From: Felix Miata @ 2016-04-11 20:26 UTC (permalink / raw)
  To: intel-gfx

Daniel Vetter composed on 2016-04-11 21:45 (UTC+0200):

> New -testing cycle with cool stuff:...

What exactly is a "testing cycle? Last Intel Xorg driver (e.g. openSUSE 42.1 
released in November: xf86-video-intel; Ubuntu 16.04, due out this month: 
xserver-xorg-video-intel) release was, what, 19 months ago, a perpetual beta 
(2.99.99?)?

Is the meaning of "cycle" (as opposed to actual dates involved for any 
particular cycle) any different for drm, Mesa or other components than for 
the xorg "driver"?
-- 
"The wise are known for their understanding, and pleasant
words are persuasive." Proverbs 16:21 (New Living Translation)

  Team OS/2 ** Reg. Linux User #211409 ** a11y rocks!

Felix Miata  ***  http://fm.no-ip.com/
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-04-11 19:45 Daniel Vetter
  2016-04-11 20:26 ` Felix Miata
  2016-04-12  9:21 ` Ville Syrjälä
  0 siblings, 2 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-04-11 19:45 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- make modeset hw state checker atomic aware (Maarten)
- close races in gpu stuck detection/seqno reading (Chris)
- tons&tons of small improvements from Chris Wilson all over the gem code
- more dsi/bxt work from Ramalingam&Jani
- macro polish from Joonas
- guc fw loading fixes (Arun&Dave)
- vmap notifier (acked by Andrew) + i915 support by Chris Wilson
- create bottom half for execlist irq processing (Chris Wilson)
- vlv/chv pll cleanup (Ville)
- rework DP detection, especially sink detection (Shubhangi Shrivastava)
- make color manager support fully atomic (Maarten)
- avoid livelock on chv in execlist irq handler (Chris)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-03-30  8:47 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-03-30  8:47 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- VBT code refactor for a clean split between parsing&using of firmware
  information (Jani)
- untangle the pll computation code, and splitting up the monster
  i9xx_crtc_compute_clocks (Ander)
- dsi support for bxt (Jani, Shashank Sharma and others)
- color manager (i.e. de-gamma, color conversion matrix & gamma support) from
  Lionel Landwerlin
- Vulkan hsw support in the command parser (Jordan Justen)
- large-scale renaming of intel_engine_cs variables/parameters to avoid the epic
  ring vs. engine confusion introduced in gen8 (Tvrtko Ursulin)
- few atomic patches from Maarten&Matt, big one is two-stage wm programming on ilk-bdw
- refactor driver load and add infrastructure to inject load failures for
  testing, from Imre
- various small things all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-03-14  7:31 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-03-14  7:31 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- two-stage wm updates for ilk-style platforms (Matt)
- more wm work and fixes from Maarten&Ville
- more work on rotated framebuffers to prep for rotated nv12 (Ville)
- more dc fixes (Imre)
- various execlist patches from Tvrtko
- various clock cleanups for gmch from Ville
- extract intel_dpll_mgr.c and refactor shared dpll code (Ander)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-02-29  9:20 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-02-29  9:20 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- fbc by default on hsw&bdw, thanks to great work by Paulo!
- psr by default hsw,bdw,vlv&chv, thanks to great work by Rodrigo!
- fixes to hw state readout vs. rpm issues (Imre)
- dc3 fixes&improvements (Mika), this and above already cherr-pick to -fixes
- first part of locking fixes from Tvrtko
- proper atomic code for load detect (Maarten)
- more rpm fixes from Ville
- more atomic work from Maarten

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-02-14 21:49 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-02-14 21:49 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- lots and lots of fbc work from Paulo
- max pixel clock checks from Mika Kahola
- prep work for nv12 offset handling from Ville
- piles of small fixes and refactorings all around

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-01-25  7:16 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-01-25  7:16 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- support for v3 vbt dsi blocks (Jani)
- improve mmio debug checks (Mika Kuoppala)
- reorg the ddi port translation table entries and related code (Ville)
- reorg gen8 interrupt handling for future platforms (Tvrtko)
- refactor tile width/height computations for framebuffers (Ville)
- kerneldoc integration for intel_pm.c (Jani)
- move default context from engines to device-global dev_priv (Dave Gordon)
- make seqno/irq ordering coherent with execlist (Chris)
- decouple internal engine number from UABI (Chris&Tvrtko)
- tons of small fixes all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2016-01-10 23:29 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2016-01-10 23:29 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- GuC ADS support (Alex Dai)
- support for v3 of the vbt mipi/dsi panel sequence (Jani Nikula)
- more prep work for atomic watermarks (Matt Roper)
- clean up cursor handling and align more with other planes (Maarten)
- improvements to the unclaimed mmio debug code (Mika Kuoppalla)
- various improvements, w/a, updated translation tables, ...

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-12-18 19:31 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-12-18 19:31 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- fix atomic watermark recomputation logic (Maarten)
- modeset sequence fixes for LPT (Ville)
- more kbl enabling&prep work (Rodrigo, Wayne)
- first bits for mst audio
- page dirty tracking fixes from Dave Gordon
- new get_eld hook from Takashi, also included in the sound tree
- fixup cursor handling when placed at address 0 (Ville)
- refactor VBT parsing code (Jani)
- rpm wakelock debug infrastructure ( Imre)
- fbdev is pinned again (Chris)
- tune the busywait logic to avoid wasting cpu cycles (Chris)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-12-04 17:01 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-12-04 17:01 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
This is the "fix igt basic test set issues" edition.
- more PSR fixes from Rodrigo, getting closer
- tons of fifo underrun fixes from Ville
- runtime pm fixes from Imre, Daniel Stone
- fix SDE interrupt handling properly (Jani Nikula)
- hsw/bdw fdi modeset sequence fixes (Ville)
- "don't register bad VGA connectors and fall over" fixes (Ville)
- more fbc fixes from Paulo
- and a grand total of exactly one feature item: Implement dma-buf/fence based
  cross-driver sync in the i915 pageflip path (Alex Goins)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-11-20 16:10 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-11-20 16:10 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
4 weeks because of my vacation, so a bit more:
- final bits of the typesafe register mmio functions (Ville)
- power domain fix for hdmi detection (Imre)
- tons of fixes and improvements to the psr code (Rodrigo)
- refactoring of the dp detection code (Ander)
- complete rework of the dmc loader and dc5/dc6 handling (Imre, Patrik and
  others)
- dp compliance improvements from Shubhangi Shrivastava
- stop_machine hack from Chris to fix corruptions when updating GTT ptes on bsw
- lots of fifo underrun fixes from Ville
- big pile of fbc fixes and improvements from Paulo
- fix fbdev failures paths (Tvrtko and Lukas Wunner)
- dp link training refactoring (Ander)
- interruptible prepare_plane for atomic (Maarten)
- basic kabylake support (Deepak&Rodrigo)
- don't leak ringspace on resets (Chris)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-10-23 10:02 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-10-23 10:02 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- 2nd attempt at atomic watermarks from Matt, but just prep for now
- fixes all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-10-12  6:53 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-10-12  6:53 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- dmc fixes from Animesh (not yet all) for deeper sleep states
- piles of prep patches from Ville to make mmio functions type-safe
- more fbc work from Paulo all over
- w/a shuffling from Arun Siluvery
- first part of atomic watermark updates from Matt and Ville (later parts had to
  be dropped again unfortunately)
- lots of patches to prepare bxt dsi support ( Shashank Sharma)
- userptr fixes from Chris
- audio rate interface between i915/snd_hda plus kerneldoc (Libin Yang)
- shrinker improvements and fixes (Chris Wilson)
- lots and lots of small patches all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-09-28  6:39 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-09-28  6:39 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- fastboot by default for some systems (Maarten Lankhorts)
- piles of workarounds for bxt and skl
- more fbc work from Paulo
- fix hdmi hotplug detection (Sonika)
- first few patches from Ville to parametrize register macros, prep work for
  typesafe mmio functions
- prep work for nv12 rotation (Tvrtko Ursulin)
- various other bugfixes and improvements all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-09-11 20:00 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-09-11 20:00 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- initialize backlight from VBT as fallback (Jani)
- hpd A support from Ville
- various atomic polish all over (mostly from Maarten)
- first parts of virtualize gpu guest support on bdw from
  Zhiyuan Lv
- GuC fixes from Alex
- polish for the chv clocks code (Ville)
- various things all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-08-28 16:08 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-08-28 16:08 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
Somehow I've forgotten to do a new dinq tag 2 weeks ago, so this covers 4 weeks.
Still not all that much due to vacation:
- PML4 pagetable support for 48b from Michel Thierry
- more fixes for sink crc from Rodrigo
- DP link settings cleanup from Ville
- GuC-based command submission from Alex Dai and Dave Gordon
- dpll cleanups for chv from Ville
- max pixel clock checking from Mika Kahola
- cleanup hpd bits handling (Jani)
- more power well trickery for chv from Ville

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-07-31  9:06 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-07-31  9:06 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- kerneldoc for tiling/swizzling/fencing code
- bxt hpd port A w/a
- various other fixes all over

... not much, everyone's on vacation.

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-07-17 21:14 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-07-17 21:14 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- prelim hw support dropped for skl after Damien fixed an ABI issue around
  planes
- legacy modesetting is done using atomic infrastructure now (Maarten)!
- more gen9 workarounds (Arun&Nick)
- MOCS programming (cache control for better performance) for skl/bxt
- vlv/chv dpll improvements (Ville)
- PSR fixes from Rodrigo
- fbc improvements from Paulo
- plumb requests into execlist submit functions (Mika)
- opregion code cleanup from Jani
- resource streamer support from Abdiel for mesa
- final fixes for 12bpc hdmi + enabling support from Ville

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-06-19 19:22 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-06-19 19:22 UTC (permalink / raw)
  To: Sun, Yi, Christophe Prigent; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- refactoring hpd irq handlers (Jani)
- polish skl dpll code a bit (Damien)
- dynamic cdclk adjustement (Ville & Mika)
- fix up 12bpc hdmi and enable it for real again (Ville)
- extend hsw cmd parser to be useful for atomic configuration (Franscico Jerez)
- even more atomic conversion and rolling state handling out across modeset code
  from Maarten & Ander
- fix DRRS idleness detection (Ramalingam)
- clean up dsp address alignment handling (Ville)
- some fbc cleanup patches from Paulo
- prevent hard-hangs when trying to reset the gpu on skl (Mika)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Re: Updated drm-intel-testing
  2015-05-22 17:48 Daniel Vetter
@ 2015-05-26  8:23 ` Daniel Martin
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Martin @ 2015-05-26  8:23 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: Intel Graphics Development, Jeff Zheng

[-- Attachment #1: Type: text/plain, Size: 1012 bytes --]

On 22 May 2015 at 19:48, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> Hi all,
>
> New -testing cycle with cool stuff:
> - cpt modeset sequence fixes from Ville
> - more rps boosting tuning from Chris
> - S3 support for skl (Damien)
> - a pile of w/a for bxt from various people
> - cleanup of primary plane pixel formats (Damien)
> - a big pile of small patches with fixes and cleanups all over
>
> Happy testing!

Done, as earlier with nightly. But, as with nightly, it crashes the
maschine as soon as I plug-in a monitor into the docking station or
boot with one already attached (Lenovo X250 sitting in a ThinkPad
Ultra Dock, Dell U2410 - tested VGA and DP).
Though, the monitor activates and shows the (expected) console output.

The attached log is from a boot without the monitor attached to the
docking station, until 25.851719, where I plugged it in. The log is
not complete, there's a "recursive lock, requiring a reboot", which
doesn't make it through my ssh connection.


Cheers,
    Daniel Martin

[-- Attachment #2: drm-intel-testing-2015-05-22.log.gz --]
[-- Type: application/x-gzip, Size: 43436 bytes --]

[-- Attachment #3: Type: text/plain, Size: 159 bytes --]

_______________________________________________
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^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-05-22 17:48 Daniel Vetter
  2015-05-26  8:23 ` Daniel Martin
  0 siblings, 1 reply; 123+ messages in thread
From: Daniel Vetter @ 2015-05-22 17:48 UTC (permalink / raw)
  To: Sun, Yi, Jeff Zheng; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- cpt modeset sequence fixes from Ville
- more rps boosting tuning from Chris
- S3 support for skl (Damien)
- a pile of w/a for bxt from various people
- cleanup of primary plane pixel formats (Damien)
- a big pile of small patches with fixes and cleanups all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-05-08 15:42 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-05-08 15:42 UTC (permalink / raw)
  To: Sun, Yi, Jeff Zheng; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- skl plane scaler support (Chandra Kondru)
- enable hsw cmd parser (Daniel and fix from Rebecca Palmer)
- skl dc5/6 support (low power display modes) from Suketu&Sunil
- dp compliance testing patches (Todd Previte)
- dp link training optimization (Mika Kahola)
- fixes to make skl resume work (Damien)
- rework modeset code to fully use atomic state objects (Ander&Maarten)
- pile of bxt w/a patchs from Nick Hoath
- (linear) partial gtt mmap support (Joonas Lahtinen)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-04-23 20:12 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-04-23 20:12 UTC (permalink / raw)
  To: Sun, Yi, Jeff Zheng; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- dither support for ns2501 dvo (Thomas Richter)
- some polish for the gtt code and fixes to finally enable the cmd parser on hsw
- first pile of bxt stage 1 enabling (too many different people to list ...)
- more psr fixes from Rodrigo
- skl rotation support from Chandra
- more atomic work from Ander and Matt
- pile of cleanups and micro-ops for execlist from Chris

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-04-10  7:36 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-04-10  7:36 UTC (permalink / raw)
  To: Sun, Yi, Jeff Zheng; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- cdclk handling cleanup and fixes from Ville
- more prep patches for olr removal from John Harrison
- gmbus pin naming rework from Jani (prep for bxt)
- remove ->new_config from Ander (more atomic conversion work)
- rps (boost) tuning and unification with byt/bsw from Chris
- cmd parser batch bool tuning from Chris
- gen8 dynamic pte allocation (Michel Thierry, based on work from Ben Widawsky)
- execlist tuning (not yet all of it) from Chris
- add drm_plane_from_index (Chandra)
- various small things all over

Note that this is already for 4.2!

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-03-27 19:25 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-03-27 19:25 UTC (permalink / raw)
  To: Sun, Yi, Jeff Zheng; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- DP link rate refactoring from Ville
- byt/bsw rps tuning from Chris
- kerneldoc for the shrinker code
- more dynamic ppgtt pte work (Michel, Ben, ...)
- vlv dpll code refactoring to prep fro bxt (Imre)
- refactoring the sprite colorkey code (Ville)
- rotated ggtt view support from Tvrtko
- roll out struct drm_atomic_state to prep for atomic update (Ander)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-03-13 21:20 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-03-13 21:20 UTC (permalink / raw)
  To: Sun, Yi, Jeff Zheng; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- EU count report param for gen9+ (Jeff McGee)
- piles of pll/wm/... fixes for chv, finally out of preliminary hw support
  (Ville, Vijay)
- gen9 rps support from Akash
- more work to move towards atomic from Matt, Ander and others
- runtime pm support for skl (Damien)
- edp1.4 intermediate link clock support (Sonika)
- use frontbuffer tracking for fbc (Paulo)
- remove ilk rc6 (John Harrison)
- a bunch of smaller things and fixes all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-02-27 18:16 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-02-27 18:16 UTC (permalink / raw)
  To: Sun, Yi, Jeff Zheng; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- Y tiling support for scanout from Tvrtko&Damien
- Remove more UMS support
- some small prep patches for OLR removal from John Harrison
- first few patches for dynamic pagetable allocation from Ben Widawsky, rebased
  by tons of other people
- DRRS support patches (Sonika&Vandana)
- fbc patches from Paulo
- make sure our vblank callbacks aren't called when the pipes are off
- various patches all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-02-13 23:47 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-02-13 23:47 UTC (permalink / raw)
  To: Sun, Yi, Jeff Zheng; +Cc: Daniel Vetter, intel-gfx

Hi all,

The 3.20 merge window hasn't even closed yet, but the drm-intel train is
already moving forward for 3.21:
- use the atomic helpers for plane_upate/disable hooks (Matt Roper)
- refactor the initial plane config code (Damien)
- ppgtt prep patches for dynamic pagetable alloc (Ben Widawsky, reworked and
  rebased by a lot of other people)
- framebuffer modifier support from Tvrtko Ursulin, drm core code from Rob Clark
- piles of workaround patches for skl from Damien and Nick Hoath
- vGPU support for xengt on the client side (Yu Zhang)
- and the usual smaller things all over

China is celebrating their new year, so no extended testing from QA this
time around. And myself I'll also be on vacation for the next week.

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-01-30 21:42 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-01-30 21:42 UTC (permalink / raw)
  To: Sun, Yi, Jeff Zheng; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- chv rps improvements from Ville
- atomic state handling prep work from Ander
- execlist request tracking refactoring from Nick Hoath
- forcewake code consolidation from Chris&Mika
- fastboot plane config refactoring and skl support from Damien
- some more skl pm patches all over (Damien)
- refactor dsi code to use drm dsi helpers and drm_panel infrastructure (Jani)
- first cut at experimental atomic plane updates (Matt Roper)
- piles of smaller things all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2015-01-17  9:46 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2015-01-17  9:46 UTC (permalink / raw)
  To: Sun, Yi, Jeff Zheng; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- refactor i915/snd-hda interaction to use the component framework (Imre)
- psr cleanups and small fixes (Rodrigo)
- a few perf w/a from Ken Graunke
- switch to atomic plane helpers (Matt Roper)
- wc mmap support (Chris Wilson & Akash Goel)
- smaller things all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-12-19 15:26 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-12-19 15:26 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- plane handling refactoring from Matt Roper and Gustavo Padovan in prep for
  atomic updates
- fixes and more patches for the seqno to request transformation from John
- docbook for fbc from Rodrigo
- prep work for dual-link dsi from Gaurav Signh
- crc fixes from Ville
- special ggtt views infrastructure from Tvrtko Ursulin
- shadow patch copying for the cmd parser from Brad Volkin
- execlist and full ppgtt by default on gen8, for testing for now

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-12-05 15:02 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-12-05 15:02 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff, first round for 3.20 - hah no typo this
time around in the version ;-)
- dual-dsi enabling from Gaurav with prep work from Jani
- reshuffling the ring init code to move towards a clean sw/hw state setup split
- ring free space refactoring from Dave Gordon
- s/seqno/request/ rework from John Harrison
- psr support for vlv/chv from Rodrigo
- skl mmio flip support from Damien
- and the usual bits&pieces all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-11-21  9:42 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-11-21  9:42 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- infoframe tracking (for fastboot) from Jesse
- start of the dri1/ums support removal
- vlv forcewake timeout fixes (Imre)
- bunch of patches to polish the rps code (Imre) and improve it on bdw (Tom
  O'Rourke)
- on-demand pinning for execlist contexts
- vlv/chv backlight improvements (Ville)
- gen8+ render ctx w/a work from various people
- skl edp programming (Satheeshakrishna et al.)
- psr docbook (Rodrigo)
- piles of little fixes and improvements all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-11-07 18:12 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-11-07 18:12 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- skl watermarks code (Damien, Vandana, Pradeep)
- reworked audio codec /eld handling code (Jani)
- rework the mmio_flip code to use the vblank evade logic and wait for rendering
  using the standard wait_seqno interface (Ander)
- skl forcewake support (Zhe Wang)
- refactor the chv interrupt code to use functions shared with vlv (Ville)
- prep work for different global gtt views (Tvrtko Ursulin)
- precompute the display PLL config before touching hw state (Ander)
- completely reworked panel power sequencer code for chv/vlv (Ville)
- pre work to split the plane update code into a prepare and commit phase
  (Gustavo Padovan)
- golden context for skl (Armin Reese)
- as usual tons of fixes and improvements all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-10-24 14:51 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-10-24 14:51 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- suspend/resume/freeze/thaw unification from Imre
- wa list improvements from Mika&Arun
- display pll precomputation from Ander Conselvan, this removed the last
  ->mode_set callbacks, a big step towards implementing atomic modesets
- more kerneldoc for the interrupt code
- 180 rotation for cursors (Ville&Sonika)
- ULT/ULX feature check macros cleaned up thanks to Damien
- piles and piles of fixes all over, bug team seems to work!

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-10-03 15:41 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-10-03 15:41 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- first batch of skl stage 1 enabling
- fixes from Rodrigo to the PSR, fbc and sink crc code
- kerneldoc for the frontbuffer tracking code, runtime pm code and the basic
  interrupt enable/disable functions
- smaller stuff all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-09-19 15:09 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-09-19 15:09 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- bunch more i830M fixes from Ville
- full ppgtt now again enabled by default
- more ppgtt fixes from Michel Thierry and Chris Wilson
- plane config work from Gustavo Padovan
- spinlock clarifications
- piles of smaller improvements all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Re: Updated drm-intel-testing
  2014-09-09  9:37   ` Daniel Vetter
@ 2014-09-09 10:04     ` Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-09-09 10:04 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

On Tue, Sep 09, 2014 at 11:37:04AM +0200, Daniel Vetter wrote:
> On Tue, Sep 09, 2014 at 05:08:58AM +0000, Sun, Yi wrote:
> > Hi Daniel,
> > 
> > Due to 2014Q3 release testing circle this week, QA will do this test in next week.
> 
> Note that this means we'll miss the -rc5 cutoff Dave Airlie put in place
> for feature pull request. I'll chat with him about this.

Ok, Dave said on irc that this delay is still ok.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Re: Updated drm-intel-testing
  2014-09-09  5:08 ` Sun, Yi
@ 2014-09-09  9:37   ` Daniel Vetter
  2014-09-09 10:04     ` Daniel Vetter
  0 siblings, 1 reply; 123+ messages in thread
From: Daniel Vetter @ 2014-09-09  9:37 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

On Tue, Sep 09, 2014 at 05:08:58AM +0000, Sun, Yi wrote:
> Hi Daniel,
> 
> Due to 2014Q3 release testing circle this week, QA will do this test in next week.

Note that this means we'll miss the -rc5 cutoff Dave Airlie put in place
for feature pull request. I'll chat with him about this.
-Daniel

> 
> Thanks
>   --Sun, Yi
> 
> > -----Original Message-----
> > From: Daniel Vetter [mailto:daniel.vetter@ffwll.ch]
> > Sent: Friday, September 5, 2014 9:16 PM
> > To: Sun, Yi
> > Cc: intel-gfx@lists.freedesktop.org; Daniel Vetter; Jani Nikula
> > Subject: Updated drm-intel-testing
> > 
> > Hi all,
> > 
> > New -testing cycle with cool stuff:
> > - final bits (again) for the rotation support (Sonika Jindal)
> > - support bl_power in the intel backlight (Jani)
> > - vdd handling improvements from Ville
> > - i830M fixes from Ville
> > - piles of prep work all over to make skl enabling just plug in (Damien, Sonika)
> > - rename DP training defines to reflect latest edp standards, this touches all
> >   drm drivers supporting DP (Sonika Jindal)
> > - cache edids during single detect cycle to avoid re-reading it for e.g. audio,
> >   from Chris
> > - move w/a for registers which are stored in the hw context to the context init
> >   code (Arun&Damien)
> > - edp panel power sequencer fixes, helps chv a lot (Ville)
> > - piles of other chv fixes all over
> > - much more paranoid pageflip handling with stall detection and better
> > recovery
> >   from Chris
> > - small things all over, as usual
> > 
> > Happy testing!
> > 
> > Cheers, Daniel
> > 
> > --
> > Daniel Vetter
> > Software Engineer, Intel Corporation
> > +41 (0) 79 365 57 48 - http://blog.ffwll.ch

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Re: Updated drm-intel-testing
  2014-09-05 13:16 Daniel Vetter
@ 2014-09-09  5:08 ` Sun, Yi
  2014-09-09  9:37   ` Daniel Vetter
  0 siblings, 1 reply; 123+ messages in thread
From: Sun, Yi @ 2014-09-09  5:08 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: intel-gfx

Hi Daniel,

Due to 2014Q3 release testing circle this week, QA will do this test in next week.

Thanks
  --Sun, Yi

> -----Original Message-----
> From: Daniel Vetter [mailto:daniel.vetter@ffwll.ch]
> Sent: Friday, September 5, 2014 9:16 PM
> To: Sun, Yi
> Cc: intel-gfx@lists.freedesktop.org; Daniel Vetter; Jani Nikula
> Subject: Updated drm-intel-testing
> 
> Hi all,
> 
> New -testing cycle with cool stuff:
> - final bits (again) for the rotation support (Sonika Jindal)
> - support bl_power in the intel backlight (Jani)
> - vdd handling improvements from Ville
> - i830M fixes from Ville
> - piles of prep work all over to make skl enabling just plug in (Damien, Sonika)
> - rename DP training defines to reflect latest edp standards, this touches all
>   drm drivers supporting DP (Sonika Jindal)
> - cache edids during single detect cycle to avoid re-reading it for e.g. audio,
>   from Chris
> - move w/a for registers which are stored in the hw context to the context init
>   code (Arun&Damien)
> - edp panel power sequencer fixes, helps chv a lot (Ville)
> - piles of other chv fixes all over
> - much more paranoid pageflip handling with stall detection and better
> recovery
>   from Chris
> - small things all over, as usual
> 
> Happy testing!
> 
> Cheers, Daniel
> 
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-09-05 13:16 Daniel Vetter
  2014-09-09  5:08 ` Sun, Yi
  0 siblings, 1 reply; 123+ messages in thread
From: Daniel Vetter @ 2014-09-05 13:16 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- final bits (again) for the rotation support (Sonika Jindal)
- support bl_power in the intel backlight (Jani)
- vdd handling improvements from Ville
- i830M fixes from Ville
- piles of prep work all over to make skl enabling just plug in (Damien, Sonika)
- rename DP training defines to reflect latest edp standards, this touches all
  drm drivers supporting DP (Sonika Jindal)
- cache edids during single detect cycle to avoid re-reading it for e.g. audio,
  from Chris
- move w/a for registers which are stored in the hw context to the context init
  code (Arun&Damien)
- edp panel power sequencer fixes, helps chv a lot (Ville)
- piles of other chv fixes all over
- much more paranoid pageflip handling with stall detection and better recovery
  from Chris
- small things all over, as usual

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-08-22 20:46 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-08-22 20:46 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- basic code for execlist, which is the fancy new cmd submission on gen8. Still
  disabled by default (Ben, Oscar Mateo, Thomas Daniel et al)
- remove the useless usage of console_lock for I915_FBDEV=n (Chris)
- clean up relations between ctx and ppgtt
- clean up ppgtt lifetime handling (Michel Thierry)
- various cursor code improvements from Ville
- execbuffer code cleanups and secure batch fixes (Chris)
- prep work for dev -> dev_priv transition (Chris)
- some of the prep patches for the seqno -> request object transition (Chris)
- various small improvements all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-07-25 20:57 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-07-25 20:57 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- Ditch UMS support (well just the config option for now)
- Prep work for future platforms (Sonika Jindal, Damien)
- runtime pm/soix fixes (Paulo, Jesse)
- psr tracking improvements, locking fixes, now enabled by default!
- rps fixes for chv (Deepak, Ville)
- drm core patches for rotation support (Ville, Sagar Kamble) - the i915 parts
  unfortunately didn't make it yet
- userptr fixes (Chris)
- minimum backlight brightness (Jani), acked long ago by Matthew Garret on irc -
  I've forgotten about this patch :(

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-07-11  9:41 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-07-11  9:41 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx, Rodrigo Vivi

Hi all,

New -testing cycle with cool stuff:
- fbc improvements when stolen memory is tight (Ben)
- cdclk handling improvements for vlv/chv (Ville)
- proper fix for stuck primary planes on gmch platforms with cxsr (Imre&Ebgert
  Eich)
- gen8 hw semaphore support (Ben)
- more execlist prep work from Oscar Mateo
- locking fixes for primary planes (Matt Roper)
- code rework to support runtime pm for dpms on hsw/bdw (Paulo, Imre & me), but
  not yet enabled because some fixes from Paulo haven't made the cut
- more gpu boost tuning from Chris
- as usual piles of little things all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-06-20  8:45 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-06-20  8:45 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- Accurate frontbuffer tracking and frontbuffer rendering invalidate, flush and
  flip events. This is prep work for proper PSR support and should also be
  useful for DRRS&fbc.
- Runtime suspend hardware on system suspend to support the new SOix sleep
  states, from Jesse.
- PSR updates for broadwell (Rodrigo)
- Universal plane support for cursors (Matt Roper), including core drm patches.
- Prefault gtt mappings (Chris)
- baytrail write-enable pte bit support (Akash Goel)
- mmio based flips (Sourab Gupta) instead of blitter ring flips
- interrupt handling race fixes (Oscar Mateo)

And old, not yet merged features from the previous round:
- rps/turbo support for chv (Deepak)
- some other straggling chv patches (Ville)
- proper universal plane conversion for the primary plane (Matt Roper)
- ppgtt on vlv from Jesse
- pile of cleanups, little fixes for insane corner cases and improved debug
  support all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-06-06 20:32 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-06-06 20:32 UTC (permalink / raw)
  To: Terence Yang; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff, first one for 3.17:
- rps/turbo support for chv (Deepak)
- some other straggling chv patches (Ville)
- proper universal plane conversion for the primary plane (Matt Roper)
- ppgtt on vlv from Jesse
- pile of cleanups, little fixes for insane corner cases and improved debug
  support all over

Aside: Chris requested that I update DRIVER_DATE regularly, so now I'll do
that every time I push out a new testing. Hopefully that helps with
keeping track of all the back/forth/side and frontporting that goes on
here for i915 ...

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-05-23 11:53 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-05-23 11:53 UTC (permalink / raw)
  To: Terence Yang; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- prep refactoring for execlists (Oscar Mateo)
- corner-case fixes for runtime pm (Imre)
- tons of vblank improvements from Ville
- prep work for atomic plane/sprite updates (Ville)
- more chv code, now almost complete (tons of different people)
- refactoring and improvements for drm_irq.c merged through drm-intel-next
- g4x/ilk reset improvements (Ville)
- removal of encoder->mode_set
- moved audio state tracking into pipe_config
- shuffled fb pinning out of the platform crtc modeset callbacks into core code
- userptr support (Chris)
- OOM handling improvements from Chris, with now have a neat oom notifier which
  jumps additional debug information.
- topdown allocation of ppgtt PDEs (Ben)
- fixes and small improvements all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-05-06  8:53 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-05-06  8:53 UTC (permalink / raw)
  To: Terence Yang; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- ring init improvements (Chris)
- vebox2 support (Zhao Yakui)
- more prep work for runtime pm on Baytrail (Imre)
- eDram support for BDW (Ben)
- prep work for userptr support (Chris)
- first parts of the encoder->mode_set callback removal (Daniel)
- 64b reloc fixes (Ben)
- first part of atomic plane updates (Ville)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-04-16 18:39 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-04-16 18:39 UTC (permalink / raw)
  To: Terence Yang; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- vlv infoframe fixes from Jesse
- dsi/mipi fixes from Shobhit
- gen8 pageflip fixes for LRI/SRM from Damien
- cmd parser fixes from Brad Volkin
- some prep patches for CHV, DRRS, ...
- and tons of little things all over

A bit earlier than usual since I'm heading off for an extended easter w/e,
and also not with a hole lot of patches really. I expect a flood of
reviewed patches when I'm back home next Tuesday ;-)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-04-04 15:12 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-04-04 15:12 UTC (permalink / raw)
  To: Terence Yang; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- cmd parser for gen7 but only in enforcing and not yet granting mode - the
  batch copying stuff is still missing. Also performance is a bit ... rough
  (Brad Volkin + OACONTROL fix from Ken).
- deprecate UMS harder (i.e. CONFIG_BROKEN)
- interrupt rework from Paulo Zanoni
- runtime PM support for bdw and snb, again from Paulo
- a pile of refactorings from various people all over the place to prep for new
  stuff (irq reworks, power domain polish, ...)

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-03-21 15:39 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-03-21 15:39 UTC (permalink / raw)
  To: Terence Yang; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- Inherit/reuse firmwar framebuffers (for real this time) from Jesse, less
  flicker for fastbooting.
- More flexible cloning for hdmi (Ville).
- Some PPGTT fixes from Ben.
- Ring init fixes from Naresh Kumar.
- set_cache_level regression fixes for the vma conversion from Ville&Chris.
- Conversion to the new dp aux helpers (Jani).
- Unification of runtime pm with pc8 support from Paulo, prep work for runtime
  pm on other platforms than HSW.
- Larger cursor sizes (Sagar Kamble).
- Piles of improvements and fixes all over, as usual.

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-03-07 23:02 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-03-07 23:02 UTC (permalink / raw)
  To: Terence Yang; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- fine-grained display power domains for byt (Imre)
- runtime pm prep patches for !hsw from Paulo
- WiZ hashing flag updates from Ville
- ppgtt setup cleanup and enabling of full 4G range on bdw (Ben)
- fixes from Jesse for the inherited intial config code
- gpu reset code improvements from Mika
- per-pipe num_planes refactoring from Damien
- stability fixes around bdw forcewake handling and other bdw w/a from Mika and
  Ken
- and as usual a pile of smaller fixes all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-02-14 17:54 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-02-14 17:54 UTC (permalink / raw)
  To: Terence Yang; +Cc: Daniel Vetter, intel-gfx

Hi all,

New -testing cycle with cool stuff:
- Fix the execbuf rebind performance regression due to topic/ppgtt (Chris).
- Fix up the connector cleanup ordering for sdvod i2c and dp aux devices (Imre).
- Try to preserve the firmware modeset config on driver load. And a bit of prep
  work for smooth takeover of the fb contents (Jesse).
- Prep cleanup for larger gtt address spaces on bdw (Ben).
- Improve our vblank_wait code to make hsw modesets faster (Paulo).
- Display debugfs file (Jesse).
- DRRS prep work from Vandana Kannan.
- pipestat interrupt handler to fix a few races around vblank/pageflip handling
  on byt (Imre).
- Improve display fuse handling for display-less SKUs (Damien).
- Drop locks while stalling for the gpu when serving pagefaults to improve
  interactivity (Chris).
- And as usual piles of other improvements and small fixes all over.

I know it's a bit a shorter -testing than usual, but I'll be on vacation
for 2 weeks now and the previous -testing round was extended a bit. So
I've figured it's better to get back into the schedule.

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-02-07 16:12 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-02-07 16:12 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

New -testing cycle with cool stuff:
- Yet more steps towards atomic modeset from Ville.
- DP panel power sequencing improvements from Paulo.
- irq code cleanups from Ville.
- 5.4 GHz dp lane clock support for bdw/hsw from Todd.
- Clock readout support for hsw/bdw (aka fastboot) from Jesse.
- Make pipe underruns report at ERROR level (Ville). This is to check our
  improved watermarks code.
- Full ppgtt support from Ben for gen7.
- More fbc fixes and improvements from Ville all over the place, unfortunately
  not yet enabled by default on more platforms.
- w/a cleanups from Ville.
- HiZ stall optimization settings (Chia-I Wu).
- Display register mmio offset refactor patch from Antti.
- RPS improvements for corner-cases from Jeff McGee.

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2014-01-10 21:48 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2014-01-10 21:48 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

New -testing cycle with cool stuff:
- final bits for runtime D3 on Haswell from Paul (now enabled fully)
- parse the backlight modulation freq information in the VBT from Jani
  (but not yet used)
- more watermark improvements from Ville for ilk-ivb and bdw
- bugfixes for fastboot from Jesse
- watermark fix for i830M (but not yet everything)
- vlv vga hotplug w/a (Imre)
- piles of other small improvements, cleanups and fixes all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-12-13 17:20 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-12-13 17:20 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

New -testing cycle with cool stuff:
- fbc1 improvements from Ville (pre-gm45).
- vlv forcewake improvements from Deepak S.
- Some corner-cases fixes from Mika for the context hang stat code.
- pc8 improvements and prep work for runtime D3 from Paulo, almost ready for
  primetime.
- gen2 dpll fixes from Ville.
- DSI improvements from Shobhit Kumar.
- A few smaller fixes and improvements all over.

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-11-29 15:27 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-11-29 15:27 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

New -testing cycle with cool stuff:
- some more ppgtt prep patches from Ben
- a few fbc fixes from Ville
- power well rework from Imre
- vlv forcewake improvements from Deepak S, Ville and Jesse
- a few smaller things all over

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-11-03 13:47 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-11-03 13:47 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

New -testing cycle with cool stuff:
- Tons more improvement to the display CRC code. It works now on all
  platforms supported by the i915 driver. Also there's an "auto"
  target now for platforms where some ports require a special CRC tap
  point.
- More power domain infrastructure work from Imre.
- Fixed locking for CRC capturing (Damien).
- A pile of smaller improvements and fixes all over.

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-10-18 15:04 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-10-18 15:04 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

New -testing cycle with cool stuff:
- CRC support from Damien and He Shuang. Long term this should allow us to
  test an awful lot modesetting corner cases automatically. So for me as
  the maintainer this is really big.
- HDMI audio fix from Jani.
- VLV dpll computation code refactoring from Ville.
- Fixups for the gpu booster from last time around (Chris).
- Some cleanups in the context code from Ben.
- More watermark work from Ville (we'll be getting there ...).
- vblank timestamp improvements from Ville.
- CONFIG_FB=n support, including drm core changes to make the fbdev
  helpers optional.
- DP link training improvements (Jani).
- mmio vtable from Ben, prep work for future hw.

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-10-04  9:07 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-10-04  9:07 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

New -testing cycle with cool stuff:
- Stereo/3d support for hdmi from Damien, both the drm core bits and
  the i915 integration.
- Manual boost/deboost logic for gpu turbo (Chris)
- Fixed up clock readout support for vlv (Chris).
- Tons of little fixes and improvements for vlv in general (Chon Minng
  Lee and Jesse Barnes).
- Power well support for the legacy vga plane (Ville).
- DP impromevents from Jani.
- Improvements to the Haswell modeset sequence (Ville+Paulo).
- Haswell DDI improvements, using the VBT for some tuning values and
  to check the configuration (Paulo).
- Tons of other small improvements and fixups.

Happy testing!

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-09-20 22:24 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-09-20 22:24 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

New -testing branch with cool stuff:
- clock state handling rework from Ville
- l3 parity handling fixes for hsw from Ben
- some more watermark improvements from Ville
- ban badly behaved context from Mika
- a few vlv improvements from Jesse
- VGA power domain handling from Ville

Happy testing!

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-09-06 16:26 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-09-06 16:26 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

Nothing earth-shattering yet for 3.13, and most of the new stuff is
bugfixes for 3.12. Since I've already sent a pull for those to Dave I'll
only list the feature stuff here now:
- Basic mipi dsi support from Jani. Not yet converted over to drm_bridge
  since that was too fresh, but the porting is in progress already.
- More vma patches from Ben, this time the code to convert the execbuffer
  code. Now that the shrinker recursion bug is tracked down we can move
  ahead here again. Yay!
- Optimize hw context switching to not generate needless interrupts (Chris
  Wilson). Also some shuffling for the oustanding request allocation.
- Opregion support for SWSCI, although not yet fully wired up (we need a
  bit of runtime D3 support for that apparently, due to Windows design
  deficiencies), from Jani Nikula.
- A few smaller changes all over.

Overall not a really big pile of stuff.

Happy testing!
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-08-23 19:16 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-08-23 19:16 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

New testing round:
- pc8+ support from Paulo
- more vma patches from Ben.
- Kconfig option to enable preliminary support by default (Josh
  Triplett)
- Optimized cpu cache flush handling and support for write-through caching
  of display planes on Iris (Chris)
- rc6 tuning from Stéphane Marchesin for more stability
- VECS seqno wrap/semaphores fix (Ben)
- a pile of smaller cleanups and improvements all over

Note that I've dropped the execbuf vma conversion from Ben though since it
felt a bit risky and I don't want to rock the 3.12 boat too much. I'll
immediately reapply those again next for the new dinq.

And a second heads-up: I expect that the next feature round won't hit
3.12, so from now on it's all for 3.13. Or at least very likely for 3.13.

Happy testing!

Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-08-09 19:08 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-08-09 19:08 UTC (permalink / raw)
  To: Yang, Guang A; +Cc: Intel Graphics Development

Hi all,

New testing cycle, new features:
- Cleanup of the old crtc helper callbacks, all encoders are now converted
  to the i915 modeset infrastructure.
- Massive amount of wm patches from Ville for ilk, snb, ivb, hsw, this is
  prep work to eventually get things going for nuclear pageflips where we
  need to adjust watermarks on the fly.
- More vm/vma patches from Ben. This refactoring isn't yet fully rolled
  out, we miss the execbuf conversion and some of the low-level
  bind/unbind support code.
- Convert our hdmi infoframe code to use the new common helper functions
  (Damien). This contains some bugfixes for the common infoframe helpers.
- Some cruft removal from Damien.
- Various smaller bits&pieces all over, as usual.

Cheers, Daniel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-06-30 11:13 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-06-30 11:13 UTC (permalink / raw)
  To: Shui, Yangwei; +Cc: Intel Graphics Development

Hi all,

New testing tree. I still need to split it up into fixes for 3.11, but the
new features here most likely will all go into 3.12. Highlights:
- fixup the unwind paths for "ghost eDP" on haswell (Paulo)
- fix pch detection on virtual machines
- fix sdvo hpd on i965g/gm (Bspec was wrong!)
- more strict scanout pitches checking (Chris)
- track more shared dpll state in pipe config
- vlv dpll fixes (Ville)
- cleanup and tunings for the vlv rps code (Ville)
- interrupt related locking fixes around the hpd code

Happy testing!

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-06-18 13:24 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-06-18 13:24 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Intel Graphics Development

Hi all,

So apparently I've failed to send the -testing update mail last Friday.
But that tree turned out to be seriously broken anyway, so seems I've been
lucky. Anyway, a big one with quite some patches:
- more hangcheck work from Mika and Chris to prepare for arb robustness
- trickle feed fixes from Ville
- first parts of the shared pch pll rework, with some basic hw state
  readout and cross-checking
- Haswell audio power well support from Wang Xingchao (alsa bits acked by
  Takashi)
- some cleanups and asserts sprinkling around the plane/gamma enabling
  sequence from Ville
- more gtt refactoring from Ben
- clear up the adjusted->mode vs. pixel clock vs. port clock confusion
- 30bpp support, this time for real hopefully


Happy testing!

Cheers, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* Updated drm-intel-testing
@ 2013-03-23 11:31 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-03-23 11:31 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Intel Graphics Development

Hi all,

New testing round!
- Imre's for_each_sg_pages rework (now also with the stolen mem backed
  cased fixed with a hacke) plus the prime sg list coalescing patch from
  Rahul Sharma.
- vlv patches from Jesse et al, by far not yet complete.
- More unclaimed register fixes from Paulo.
- Minor fixlets (Kees Cook, Mihnea Dobrescu-Balaur, Ben, Ville).
- Some prep-work for the crazy no-pch platform by Ben.

In general not a massive -next round mostly since I've been absorbed by a
bit of travelling and fire-fighting some ugly regressions. I expect normal
merge pace to resume next week so that we can work through a bit of the
backlog (especially Egbert's hpd handling rework's been laying around for
way too long).

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

* updated drm-intel-testing
@ 2013-02-01 14:27 Daniel Vetter
  0 siblings, 0 replies; 123+ messages in thread
From: Daniel Vetter @ 2013-02-01 14:27 UTC (permalink / raw)
  To: Sun, Yi; +Cc: Intel Graphics Development

Hi all

New -next cut, probably the last one for 3.9. Highlights
- clarified the reset state machine and made it robuster
- some memory barrier clarifications/fixes from Chris
- gen4 inverted brightness quirks from Jani
- fix for hsw eld support (Wang Xingchao)
- kill the vlv IS_DISPLAYREG hack (Ville)
- more gtt cleanups and refactors from Ben
- unclaimed register fixes for hsw (Paulo)
- haswell display power well support (Paulo)

Happy testing!

/me heads of to fosdem

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 123+ messages in thread

end of thread, other threads:[~2018-11-22 15:30 UTC | newest]

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2013-02-01 14:27 updated drm-intel-testing Daniel Vetter

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