From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 40/43] drm/i915/bdw: Document Logical Rings,
 LR contexts and Execlists
Date: Fri, 15 Aug 2014 14:42:16 +0200
Message-ID: <20140815124216.GS10500@phenom.ffwll.local>
References: <1406217891-8912-1-git-send-email-thomas.daniel@intel.com>
 <1406217891-8912-41-git-send-email-thomas.daniel@intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces@lists.freedesktop.org>
Received: from mail-wg0-f46.google.com (mail-wg0-f46.google.com [74.125.82.46])
 by gabe.freedesktop.org (Postfix) with ESMTP id 55C726E7D7
 for <intel-gfx@lists.freedesktop.org>; Fri, 15 Aug 2014 05:42:05 -0700 (PDT)
Received: by mail-wg0-f46.google.com with SMTP id m15so2263774wgh.29
 for <intel-gfx@lists.freedesktop.org>; Fri, 15 Aug 2014 05:42:04 -0700 (PDT)
Content-Disposition: inline
In-Reply-To: <1406217891-8912-41-git-send-email-thomas.daniel@intel.com>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
To: Thomas Daniel <thomas.daniel@intel.com>
Cc: intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

On Thu, Jul 24, 2014 at 05:04:48PM +0100, Thomas Daniel wrote:
> +/**
> + * intel_lr_context_render_state_init() - render state init for Execlists
> + * @ring: Engine Command Streamer.
> + * @ctx: Context to initialize.
> + *
> + * A.K.A. null-context, A.K.A. golden-context. In a word, the render engine
> + * contexts require to always have a valid 3d pipeline state. As this is
> + * achieved with the submission of a batchbuffer, we require an alternative
> + * entry point to the legacy ringbuffer submission one (i915_gem_render_state_init).
> + *
> + * Return: non-zero if the initialization failed.
> + */

I've dropped this hunk here since that part isn't merged yet.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch