From mboxrd@z Thu Jan 1 00:00:00 1970 From: catalin.marinas@arm.com (Catalin Marinas) Date: Fri, 15 Aug 2014 14:10:26 +0100 Subject: [PATCH 4/6] arm64: Add DTS support for FSL's LS2085A SoC In-Reply-To: References: <1408096156-29772-1-git-send-email-bhupesh.sharma@freescale.com> <1408096156-29772-5-git-send-email-bhupesh.sharma@freescale.com> <20140815101249.GA19939@localhost> Message-ID: <20140815131026.GB18863@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Aug 15, 2014 at 01:53:13PM +0100, Stuart Yoder wrote: > > On Fri, Aug 15, 2014 at 10:49:13AM +0100, Bhupesh Sharma wrote: > > > + cpus { > > > + #address-cells = <2>; > > > + #size-cells = <0>; > > > + > > > + /* We have 4 clusters having 2 Cortex-A57 cores each */ > > > + cpu at 0 { > > > + device_type = "cpu"; > > > + compatible = "arm,cortex-a57"; > > > + reg = <0x0 0x0>; > > > + enable-method = "spin-table"; > > > + cpu-release-addr = <0x0 0x8000fff8>; > > > + }; > > > > Why not PSCI? > > It simply is where we are today-- we don't have functioning PSCI yet > but plan to get there over time. Thanks for clarification. > All the existing device trees > in arch/arm64 use "spin-table", so it seems that other platforms are > in the same situation: > apm-storm.dtsi Not possible because there is no EL3 mode on the CPU implementation. > foundation-v8.dts > rtsm_ve-aemv8a.dts These work with the latest boot wrapper (which overrides the DT nodes and passes the PSCI information). -- Catalin