From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 11/14] drm/i915: Be more careful when picking the initial power sequencer pipe Date: Thu, 4 Sep 2014 14:59:37 +0200 Message-ID: <20140904125937.GJ15520@phenom.ffwll.local> References: <1408389369-22898-1-git-send-email-ville.syrjala@linux.intel.com> <1408389369-22898-12-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-we0-f181.google.com (mail-we0-f181.google.com [74.125.82.181]) by gabe.freedesktop.org (Postfix) with ESMTP id C07266E3CB for ; Thu, 4 Sep 2014 05:59:19 -0700 (PDT) Received: by mail-we0-f181.google.com with SMTP id x48so10192655wes.40 for ; Thu, 04 Sep 2014 05:59:16 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1408389369-22898-12-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Aug 18, 2014 at 10:16:06PM +0300, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > Try to make sure we find the power sequencer that the BIOS used > by first looking for one which has the panel power enabled, then > fall back to one with VDD force bit enabled, and finally look at > just the port select bits. This should make us pick the correct > power sequencer when the BIOS has already enabled the panel. > = > Signed-off-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/intel_dp.c | 36 ++++++++++++++++++++++++++++++++++-- > 1 file changed, 34 insertions(+), 2 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel= _dp.c > index 4614e6e..4952783 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -341,9 +341,31 @@ vlv_power_sequencer_pipe(struct intel_dp *intel_dp) > return intel_dp->pps_pipe; > } > = > +typedef bool (*vlv_pipe_check)(struct drm_i915_private *dev_priv, > + enum pipe pipe); > + > +static bool vlv_pipe_has_pp_on(struct drm_i915_private *dev_priv, > + enum pipe pipe) > +{ > + return I915_READ(VLV_PIPE_PP_STATUS(pipe)) & PP_ON; > +} > + > +static bool vlv_pipe_has_vdd_on(struct drm_i915_private *dev_priv, > + enum pipe pipe) > +{ > + return I915_READ(VLV_PIPE_PP_CONTROL(pipe)) & EDP_FORCE_VDD; > +} > + > +static bool vlv_pipe_any(struct drm_i915_private *dev_priv, > + enum pipe pipe) > +{ > + return true; > +} > + > static enum pipe > vlv_initial_power_sequencer_pipe(struct drm_i915_private *dev_priv, I've done a s/popwer_sequencer/pps/ here to make the lines fit. Might want to roll that out in general perhaps, atm there's a mix of power_sequencer and pps. -Daniel > - enum port port) > + enum port port, > + vlv_pipe_check pipe_check) > { > enum pipe pipe; > = > @@ -354,6 +376,9 @@ vlv_initial_power_sequencer_pipe(struct drm_i915_priv= ate *dev_priv, > if (port_sel !=3D PANEL_PORT_SELECT_VLV(port)) > continue; > = > + if (!pipe_check(dev_priv, pipe)) > + continue; > + > return pipe; > } > = > @@ -372,7 +397,14 @@ vlv_initial_power_sequencer_setup(struct intel_dp *i= ntel_dp) > lockdep_assert_held(&dev_priv->pps_mutex); > = > /* try to find a pipe with this port selected */ > - intel_dp->pps_pipe =3D vlv_initial_power_sequencer_pipe(dev_priv, port); > + /* first pick one where the panel is on */ > + intel_dp->pps_pipe =3D vlv_initial_power_sequencer_pipe(dev_priv, port,= vlv_pipe_has_pp_on); > + /* didn't find one? pick one where vdd is on */ > + if (intel_dp->pps_pipe =3D=3D INVALID_PIPE) > + intel_dp->pps_pipe =3D vlv_initial_power_sequencer_pipe(dev_priv, port= , vlv_pipe_has_vdd_on); > + /* didn't find one? pick one with just the correct port */ > + if (intel_dp->pps_pipe =3D=3D INVALID_PIPE) > + intel_dp->pps_pipe =3D vlv_initial_power_sequencer_pipe(dev_priv, port= , vlv_pipe_any); > = > /* didn't find one? just let vlv_power_sequencer_pipe() pick one when n= eeded */ > if (intel_dp->pps_pipe =3D=3D INVALID_PIPE) { > -- = > 1.8.5.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch