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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Rob Herring" <rob.herring@linaro.org>,
	"Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
	"Fabian Aggeler" <aggelerf@ethz.ch>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Alexander Graf" <agraf@suse.de>,
	"Greg Bellows" <greg.bellows@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Christoffer Dall" <christoffer.dall@linaro.org>,
	"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn
Date: Fri, 26 Sep 2014 09:45:40 +1000	[thread overview]
Message-ID: <20140925234540.GX16081@toto> (raw)
In-Reply-To: <CAFEAcA-VbpVv3Q3YhDPKgZrM9KkoGiBhgFpct6p+JqyWtpXSXQ@mail.gmail.com>

On Fri, Sep 26, 2014 at 12:43:40AM +0100, Peter Maydell wrote:
> On 26 September 2014 00:31, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
> > On Fri, Sep 26, 2014 at 12:17:59AM +0100, Peter Maydell wrote:
> >> Oh, yes, that's the trap enable bit. In that case we shouldn't
> >> be using EXCP_SMC: this isn't routing the SMC exception, it's
> >> taking a Hyp trap exception, and in AArch32 the vector
> >> entry point is different. (Granted, you can't get to AArch32
> >> by taking an exception from AArch64, but we should use the
> >> right EXCP_ value to avoid the code looking gratuitously
> >> different for the two cases.)
> >
> > I see. I hadn't thought much about the AArch32 case here. For
> > AArch64, the pseudo code referes to this as route_to_el2.
> 
> Mmm, but the pseudocode keeps AArch64 and AArch32 exception
> paths a lot more separate than we do, and so it doesn't need
> any information about the AArch32 exception when it's dealing
> with a from-AArch64 exception. Our implementation routes
> both paths in common, and so it's slightly clearer to always
> retain the correct info for both cases (if nothing else, it's
> slightly more accurate when we print out debug log about
> what exceptions we're taking).

Agreed, your suggestion makes sense and will save some
pain for the A32 case. Good catch, thanks.

> 
> > Anyway, your comment makes sense to avoid diff between a32/a64
> > and I think it actually makes the AArch64 code a bit cleaner
> > aswell.
> >
> > I'll add EXCP_HYP_TRAP.
> 
> Thanks.
> 
> -- PMM

  reply	other threads:[~2014-09-25 23:56 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-13  4:29 [Qemu-devel] [PATCH v6 00/10] target-arm: Parts of the AArch64 EL2/3 exception model Edgar E. Iglesias
2014-09-13  4:29 ` [Qemu-devel] [PATCH v6 01/10] target-arm: Add HCR_EL2 Edgar E. Iglesias
2014-09-13  4:29 ` [Qemu-devel] [PATCH v6 02/10] target-arm: Add SCR_EL3 Edgar E. Iglesias
2014-09-17 15:49   ` Greg Bellows
2014-09-25 18:15   ` Peter Maydell
2014-09-25 19:49     ` Greg Bellows
2014-09-25 19:53       ` Peter Maydell
2014-09-25 20:00         ` Greg Bellows
2014-09-25 22:12     ` Edgar E. Iglesias
2014-09-13  4:29 ` [Qemu-devel] [PATCH v6 03/10] target-arm: A64: Refactor aarch64_cpu_do_interrupt Edgar E. Iglesias
2014-09-13  4:29 ` [Qemu-devel] [PATCH v6 04/10] target-arm: Break out exception masking to a separate func Edgar E. Iglesias
2014-09-13  4:29 ` [Qemu-devel] [PATCH v6 05/10] target-arm: Don't take interrupts targeting lower ELs Edgar E. Iglesias
2014-09-13  4:29 ` [Qemu-devel] [PATCH v6 06/10] target-arm: A64: Correct updates to FAR and ESR on exceptions Edgar E. Iglesias
2014-09-13  4:29 ` [Qemu-devel] [PATCH v6 07/10] target-arm: A64: Emulate the HVC insn Edgar E. Iglesias
2014-09-17 21:47   ` Greg Bellows
2014-09-25 18:39   ` Peter Maydell
2014-09-25 22:20     ` Edgar E. Iglesias
2014-09-25 23:01       ` Peter Maydell
2014-09-25 23:06         ` Edgar E. Iglesias
2014-09-25 23:19           ` Peter Maydell
2014-09-13  4:29 ` [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn Edgar E. Iglesias
2014-09-17 22:43   ` Greg Bellows
2014-09-25 18:47   ` Peter Maydell
2014-09-25 22:55     ` Edgar E. Iglesias
2014-09-25 23:17       ` Peter Maydell
2014-09-25 23:31         ` Edgar E. Iglesias
2014-09-25 23:43           ` Peter Maydell
2014-09-25 23:45             ` Edgar E. Iglesias [this message]
2014-09-26  8:20             ` Edgar E. Iglesias
2014-09-13  4:29 ` [Qemu-devel] [PATCH v6 09/10] target-arm: Add IRQ and FIQ routing to EL2 and 3 Edgar E. Iglesias
2014-09-25 19:14   ` Peter Maydell
2014-09-13  4:29 ` [Qemu-devel] [PATCH v6 10/10] target-arm: Add support for VIRQ and VFIQ Edgar E. Iglesias
2014-09-25 19:36   ` Peter Maydell
2014-09-25 23:03     ` Edgar E. Iglesias

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