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From: Radim =?utf-8?B?S3LEjW3DocWZ?= <rkrcmar@redhat.com>
Subject: Re: [PATCH 08/21] KVM: x86: Reset FPU state during reset
Date: Thu, 6 Nov 2014 18:38:09 +0100
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Cc: Nadav Amit <nadav.amit@gmail.com>,
	Nadav Amit <namit@cs.technion.ac.il>, kvm@vger.kernel.org
To: Paolo Bonzini <pbonzini@redhat.com>
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2014-11-06 10:44+0100, Paolo Bonzini:
>=20
>=20
> On 06/11/2014 10:13, Nadav Amit wrote:
> >=20
> >> On Nov 6, 2014, at 10:58, Paolo Bonzini <pbonzini@redhat.com> wrot=
e:
> >>
> >> On 05/11/2014 21:31, Nadav Amit wrote:
> >>> You are correct, it does not appear clearly in the SDM, but that =
is what real hardware does.
> >>> If you look at bochs - http://code.metager.de/source/xref/bochs/b=
ochs/cpu/init.cc - you=E2=80=99ll see they call
> >>> "BX_CPU_THIS_PTR xcr0.set32(0x1);=E2=80=9D regardless to whether =
it is hardware or software reset (the latter happens on INIT).
> >>
> >> Fair enough. :)
> > Thanks. It is turning harder to find references for the crazy x86 b=
ehaviour. :)
>=20
> Indeed, I'll ask Intel to clarify this one too.
>=20
> The crazy thing is that AMD doesn't say anything, either!  Their own=20
> manual just says "Hardware initializes XCR0 to 0000_0000_0000_0001h",=
=20
> but it doesn't say when.

I found AMD 2:15.21.8
  INIT reinitializes the control registers, segment registers and GP
  registers in a manner similar to RESET, but does not alter the
  contents of most MSRs, caches or numeric coprocessor (x87 or SSE)
  state,

So reseting XCR0 is ok, but we shouldn't call fx_init() on INIT,
the version below seems fine in this regard.