From mboxrd@z Thu Jan 1 00:00:00 1970 From: Neil Horman Subject: Re: [PATCH v4 3/5] hash: add fallback to software CRC32 implementation Date: Wed, 19 Nov 2014 10:05:33 -0500 Message-ID: <20141119150533.GA28013@localhost.localdomain> References: <546B607B.9030808@sts.kz> <20141118160005.GC32375@hmsreliant.think-freely.org> <546B7E2D.7050705@sts.kz> <20141118174619.GE32375@hmsreliant.think-freely.org> <20141118175226.GC5840@bricha3-MOBL3> <20141118213624.GF32375@hmsreliant.think-freely.org> <20141119101614.GA6532@bricha3-MOBL3> <20141119113408.GA10004@hmsreliant.think-freely.org> <20141119113827.GB2604@bricha3-MOBL3> <2601191342CEEE43887BDE71AB977258213B6C4D@IRSMSX105.ger.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Cc: "dev-VfR2kkLFssw@public.gmane.org" To: "Ananyev, Konstantin" Return-path: Content-Disposition: inline In-Reply-To: <2601191342CEEE43887BDE71AB977258213B6C4D-kPTMFJFq+rEu0RiL9chJVbfspsVTdybXVpNB7YpNyf8@public.gmane.org> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces-VfR2kkLFssw@public.gmane.org Sender: "dev" On Wed, Nov 19, 2014 at 11:50:40AM +0000, Ananyev, Konstantin wrote: >=20 >=20 > > -----Original Message----- > > From: dev [mailto:dev-bounces-VfR2kkLFssw@public.gmane.org] On Behalf Of Bruce Richardson > > Sent: Wednesday, November 19, 2014 11:38 AM > > To: Neil Horman > > Cc: dev-VfR2kkLFssw@public.gmane.org > > Subject: Re: [dpdk-dev] [PATCH v4 3/5] hash: add fallback to software= CRC32 implementation > >=20 > > On Wed, Nov 19, 2014 at 06:34:08AM -0500, Neil Horman wrote: > > > On Wed, Nov 19, 2014 at 10:16:14AM +0000, Bruce Richardson wrote: > > > > On Tue, Nov 18, 2014 at 04:36:24PM -0500, Neil Horman wrote: > > > > > On Tue, Nov 18, 2014 at 05:52:27PM +0000, Bruce Richardson wrot= e: > > > > > > On Tue, Nov 18, 2014 at 12:46:19PM -0500, Neil Horman wrote: > > > > > > > On Tue, Nov 18, 2014 at 11:13:17PM +0600, Yerden Zhumabekov= wrote: > > > > > > > > > > > > > > > > 18.11.2014 22:00, Neil Horman =D0=BF=D0=B8=D1=88=D0=B5=D1= =82: > > > > > > > > > On Tue, Nov 18, 2014 at 09:06:35PM +0600, Yerden Zhumab= ekov wrote: > > > > > > > > >> 18.11.2014 20:41, Neil Horman =D0=BF=D0=B8=D1=88=D0=B5= =D1=82: > > > > > > > > >>> On Tue, Nov 18, 2014 at 08:03:40PM +0600, Yerden Zhum= abekov wrote: > > > > > > > > >>>> /** > > > > > > > > >>>> * Use single crc32 instruction to perform a hash o= n a 4 byte value. > > > > > > > > >>>> + * Fall back to software crc32 implementation in ca= se SSE4.2 is > > > > > > > > >>>> + * not supported > > > > > > > > >>>> * > > > > > > > > >>>> * @param data > > > > > > > > >>>> * Data to perform hash on. > > > > > > > > >>>> @@ -376,11 +413,18 @@ crc32c_2words(uint64_t data, u= int32_t init_val) > > > > > > > > >>>> static inline uint32_t > > > > > > > > >>>> rte_hash_crc_4byte(uint32_t data, uint32_t init_val= ) > > > > > > > > >>>> { > > > > > > > > >>>> - return _mm_crc32_u32(init_val, data); > > > > > > > > >>>> +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2 > > > > > > > > >>>> + if (likely(crc32_alg =3D=3D CRC32_SSE42)) > > > > > > > > >>>> + return _mm_crc32_u32(init_val, data); > > > > > > > > >>>> +#endif > > > > > > > > >>> you don't really need these ifdefs here anymore given= that you have a > > > > > > > > >>> constructor to do the algorithm selection. In fact y= ou need to remove them, in > > > > > > > > >>> the event you build on a system that doesn't support = SSE42, but run on a system > > > > > > > > >>> that does. > > > > > > > > >> Originally, I thought so as well. I wrote the code wit= hout these ifdefs, > > > > > > > > >> but it didn't compile on my machine which doesn't supp= ort SSE4.2. Error > > > > > > > > >> was triggered by nmmintrin.h which has a check for res= pective GCC > > > > > > > > >> extension. So I think these ifdefs are indeed required= . > > > > > > > > >> > > > > > > > > > You need to edit the makefile so that the compiler gets= passed the option > > > > > > > > > -msse42. That way it will know to emit sse42 instructi= ons. It will also allow > > > > > > > > > you to remove the ifdef from the include file > > > > > > > > > > > > > > > > In this case, I guess there are two options: > > > > > > > > 1) modify all makefiles which use librte_hash > > > > > > > > 2) move all function bodies from rte_hash_crc.h to separa= te module, > > > > > > > > leaving prototype definitions there only. > > > > > > > > > > > > > > > > Everybody's up for the second option? :) > > > > > > > > > > > > > > > Crud, you're right, I didn't think about the header inclusi= on issue. Is it > > > > > > > worth adding the jump to enable the dynamic hash selection? > > > > > > > Neil > > > > > > > > > > > > Maybe for cases where SSE4.2 is not currently available, i.e.= for generic builds. > > > > > > For builds where we have hardware support confirmed at compil= e time, just use > > > > > > the function from the header file. > > > > > > Does that make sense? > > > > > > > > > > > I'm not certain of that, as I don't think anything can be 'conf= irmed' at compile > > > > > time. I.e. just because you have sse42 at compile time doesn't= guarantee you > > > > > have it at run time with a DSO. If you have these as macros, y= ou need to enable > > > > > sse42 whereever you include the file so that the intrinsic work= s properly. > > > > > > > > Well, if you compile with sse42 at compile time, the compiler is = free to insert > > > > sse4 instructions at any place it feels like, irrespective of whe= ther or not you > > > > use SSE4 intrinsics, so I would never expect such a DSO to work o= n a system > > > > without SSE42 support. > > > > > > > > > > > > > > an alternate option would be to not use the intrinsic, and craf= t some explicit > > > > > __asm__ statement that executes the right sse42 instructions. = That way the asm > > > > > is directly emitted, without requiring the -msse42 flag at all,= and it will just > > > > > work in all the files that call it. > > > > > > > > > > > > > I really don't like that approach. I think using intrinsics is mu= ch more > > > > maintainable. > > > > > > > I grant you that using an intrinsic is easier to read, but if the c= ode doesn't > > > compile when using the intrinsic unless you have sse42 turned on, I= 'm not sure > > > what choice we have. and inline asm isn't that hard to maintain. = We're talking > > > about three lines of code: > > > asm( > > > "mov %[1],%eax > > > mov %[2],%edx > > > crc32l %edx,%eax": > > > [edx] "r" (crc) /*output*/ > > > : > > > [1] "r" (crc), /* input */ > > > [2] "r" (val) > > > : > > > [eax] "r" /* clobber */ > > > ) > > > > > > I don't have the syntax quite right, but its pretty easy to read th= e intent. > > > Its not like we dont have precidence for this, the atomic interface= and several > > > pmds do this frequently. > > > > > > Neil > >=20 > > Fair point. If everyone else is happy enough with it, I'm ok too. >=20 > As I remember with gcc & icc it is possible to specify tht you'd like t= o compile that particular function > for different target. > From https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html: > "target > The target attribute is used to specify that a function is to be compil= ed with different target options than specified on the command line. This= can be used for instance to have functions compiled with a different ISA= (instruction set architecture) than the default. You can also use the =E2= =80=98#pragma GCC target=E2=80=99 pragma to set more than one function to= be compiled with specific target options. See Function Specific Option P= ragmas, for details about the =E2=80=98#pragma GCC target=E2=80=99 pragma= . > For instance on a 386, you could compile one function with target("sse4= .1,arch=3Dcore2") and another with target("sse4a,arch=3Damdfam10"). This = is equivalent to compiling the first function with -msse4.1 and -march=3D= core2 options, and the second function with -msse4a and -march=3Damdfam10= options. It is up to the user to make sure that a function is only invok= ed on a machine that supports the particular ISA it is compiled for (for = example by using cpuid on 386 to determine what feature bits and architec= ture family are used). >=20 > int core2_func (void) __attribute__ ((__target__ ("arch=3Dcor= e2"))); > int sse3_func (void) __attribute__ ((__target__ ("sse3"))); > You can either use multiple strings to specify multiple options, or sep= arate the options with a comma (=E2=80=98,=E2=80=99). >=20 > The target attribute is presently implemented for i386/x86_64, PowerPC,= and Nios II targets only. The options supported are specific to each tar= get. >=20 > On the 386, the following options are allowed: > ... > =E2=80=98sse4.2=E2=80=99 > =E2=80=98no-sse4.2=E2=80=99" >=20 > Wouldn't that suit your purposes? > Probably you can even keep your function inline with that approach. >=20 That would definately work, and be a great solution in this case. Howeve= r, its limited to only the most recent version of gcc. If thats an acceptible constraint on the DPDK, then its ok, but distributions are only starting = to include that version now. Not sure of the icc status of that attribute. Neil > Konstantin >=20 >=20 > >=20 > > /Bruce