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Date: Fri, 19 Dec 2014 10:23:08 +0100
From: Jiri Pirko <jiri@resnulli.us>
To: B Viswanath <marichika4@gmail.com>
Cc: Roopa Prabhu <roopa@cumulusnetworks.com>,
        "Samudrala, Sridhar" <sridhar.samudrala@intel.com>,
        John Fastabend <john.r.fastabend@intel.com>,
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        Thomas Graf <tgraf@suug.ch>, "sfeldma@gmail.com" <sfeldma@gmail.com>,
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Subject: Re: [RFC PATCH net-next v2 1/1] net: Support for switch port
 configuration
Message-ID: <20141219092308.GF1848@nanopsycho.orion>
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Fri, Dec 19, 2014 at 10:01:46AM CET, marichika4@gmail.com wrote:
>On 19 December 2014 at 13:57, Jiri Pirko <jiri@resnulli.us> wrote:
>> Fri, Dec 19, 2014 at 06:14:57AM CET, marichika4@gmail.com wrote:
>>>On 19 December 2014 at 05:18, Roopa Prabhu <roopa@cumulusnetworks.com> wrote:
>>>> On 12/18/14, 3:26 PM, Samudrala, Sridhar wrote:
><snipped for ease of reading>
>>>>>
>>>>>
>>>>> We also need an interface to set per-switch attributes. Can this work?
>>>>>     bridge link set dev sw0 sw_attr bcast_flooding 1 master
>>>>> where sw0 is a bridge representing the hardware switch.
>>>>
>>>>
>>>> Not today. We discussed this @ LPC, and one way to do this would be to have
>>>> a device
>>>> representing the switch asic. This is in the works.
>>>
>>>
>>>Can I assume that on  platforms which house more than one asic (say
>>>two 24 port asics, interconnected via a 10G link or equivalent, to get
>>>a 48 port 'switch') , the 'rocker' driver (or similar) should expose
>>>them as a single set of ports, and not as two 'switch ports' ?
>>
>> Well that really depends on particular implementation and drivers. If you
>> have 2 pci-e devices, I think you should expose them as 2 entities. For
>> sure, you can have the driver to do the masking for you. I don't believe
>> that is correct though.
>>
>
>In a platform that houses two asic chips, IMO, the user is still
>expected to manage the router as a single entity. The configuration
>being applied on both asic devices need to be matching if not
>identical, and may not be conflicting. The FDB is to be synchronized
>so that (offloaded) switching can happen across the asics. Some of
>this stuff is asic specific anyway. Another example is that of the
>learning. The (hardware) learning can't be enabled on one asic, while
>being disabled on another one. The general use cases I have seen are
>all involving managing the 'router' as a single entity.  That the
>'router' is implemented with two asics instead of a single asic (with
>more ports) is to be treated as an implementation detail.  This is the
>usual router management method that exists today.
>
>I hope I make sense.
>
>So I am trying to figure out what this single entity that will be used
>from a user perspective. It can be a bridge, but our bridges are more
>802.1q bridges. We can use the 'self' mode, but then it means that it
>should reflect the entire port count, and not just an asic.
>
>So I was trying to deduce that in our switchdevice model, the best bet
>would be to leave the unification to the driver (i.e., to project the
>multiple physical asics as a single virtual switch device). This

Is it possible to have the asic as just single one? Or is it possible to
connect asics being multiple chips maybe from multiple vendors together?
I believe that answer is "yes" in both cases. Making two separate asics
to appear as one for user is not correct in my opinion. Driver should
not do such masking. It is unclean, unextendable.


>allows any 'switch' level configurations to the bridge in 'self' mode.
>
>And  then we would need to consider stacking. Stacking differs from
>this multi-asic scenario since  there would be multiple CPU involved.
>
>Thanks
>Vissu
>
>>>
>>>>
>>>>
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