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Date: Fri, 9 Jan 2015 12:54:51 +0100
From: Cornelia Huck <cornelia.huck@de.ibm.com>
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Subject: Re: [Qemu-devel] [PATCH 1/3 V3] s390: Add PCI bus support
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To: Frank Blaschka <blaschka@linux.vnet.ibm.com>
Cc: borntraeger@de.ibm.com, Frank Blaschka <frank.blaschka@de.ibm.com>, qemu-devel@nongnu.org

On Fri,  9 Jan 2015 09:04:38 +0100
Frank Blaschka <blaschka@linux.vnet.ibm.com> wrote:


> +static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *iommu, hwaddr addr,
> +                                          bool is_write)
> +{
> +    uint64_t pte;
> +    uint32_t flags;
> +    S390PCIBusDevice *pbdev = container_of(iommu, S390PCIBusDevice, mr);
> +    S390pciState *s = S390_PCI_HOST_BRIDGE(pci_device_root_bus(pbdev->pdev)
> +                                           ->qbus.parent);
> +    IOMMUTLBEntry ret = {
> +        .target_as = &address_space_memory,
> +        .iova = 0,
> +        .translated_addr = 0,
> +        .addr_mask = ~(hwaddr)0,
> +        .perm = IOMMU_NONE,
> +    };
> +
> +    DPRINTF("iommu trans addr 0x%lx\n", addr);

This won't compile on 32 bit with debugging enabled (needs to be
PRIx64).

No need to resend the series, though; I've fixed up this and the other
occurence in this file (and the two in the inst code) since it is a
trivial change.

> +
> +    /* s390 does not have an APIC maped to main storage so we use
                                       ^
And while at it, I also fixed up this typo :)

> +     * a separate AddressSpace only for msix notifications
> +     */