From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chao Peng Subject: Re: [PATCH v5 2/6] x86: allow reading MSR_IA32_TSC with XENPF_resource_op Date: Fri, 23 Jan 2015 16:42:06 +0800 Message-ID: <20150123084206.GE28428@pengc-linux.bj.intel.com> References: <1421839164-26037-1-git-send-email-chao.p.peng@linux.intel.com> <1421839164-26037-3-git-send-email-chao.p.peng@linux.intel.com> <54C0EAFF0200007800058100@mail.emea.novell.com> <20150122125314.GD28428@pengc-linux.bj.intel.com> <54C10B05020000780005824E@mail.emea.novell.com> <54C10320.8090107@citrix.com> <54C112B102000078000582FC@mail.emea.novell.com> Reply-To: Chao Peng Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <54C112B102000078000582FC@mail.emea.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: wei.liu2@citrix.com, Ian.Campbell@citrix.com, stefano.stabellini@eu.citrix.com, Andrew Cooper , Ian.Jackson@eu.citrix.com, xen-devel@lists.xen.org, will.auld@intel.com, keir@xen.org List-Id: xen-devel@lists.xenproject.org On Thu, Jan 22, 2015 at 02:09:37PM +0000, Jan Beulich wrote: > >>> On 22.01.15 at 15:03, wrote: > > On 22/01/15 13:36, Jan Beulich wrote: > >>>>> On 22.01.15 at 13:53, wrote: > >>> On Thu, Jan 22, 2015 at 11:20:15AM +0000, Jan Beulich wrote: > >>>>>>> On 21.01.15 at 12:19, wrote: > >>>>> --- a/xen/arch/x86/platform_hypercall.c > >>>>> +++ b/xen/arch/x86/platform_hypercall.c > > > Having said this, the only useful timestamp will be at the same point as > > performing the MSR read. Having a 3rd operation tacked on the end to > > get a timestamp will be some arbitrary time later, especially if > > interrupts are enabled. > > Perhaps the latching of NOW() could happen with the MSR read, and > the latched value then be stored upon encountering the respective > slot? That would also allow further limiting the interrupts disabled > period. Except that MSR_IA32_TSC will looks heterogeneous. But since we already treat it as a special case, I have no problem here. And if we do so, even the first patch to add irq_disable ability is not needed. Sounds to me that the MSR_IA32_TSC read should always imply irq disabled. Codes would be like this: case XEN_RESOURCE_OP_MSR_READ: if ( unlikely(entry->idx == MSR_IA32_TSC) ) { entry->val = get_s_time_fixed(tsc); ret = 0; } else { bool_t read_tsc = 0; if ( i < ra->nr_done - 1 ) { xenpf_resource_entry_t *next = ra->entries + i + 1; if ( unlikely(next->idx == MSR_IA32_TSC) ) read_tsc = 1; } if ( unlikely(read_tsc) ) local_irq_save(irqflags); ret = rdmsr_safe(entry->idx, entry->val); if ( unlikely(read_tsc) ) { rdtscll(tsc); local_irq_restore(irqflags); } } break; case XEN_RESOURCE_OP_MSR_WRITE: Chao