From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965839AbbBCPWa (ORCPT ); Tue, 3 Feb 2015 10:22:30 -0500 Received: from pandora.arm.linux.org.uk ([78.32.30.218]:45476 "EHLO pandora.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933996AbbBCPW1 (ORCPT ); Tue, 3 Feb 2015 10:22:27 -0500 Date: Tue, 3 Feb 2015 15:22:05 +0000 From: Russell King - ARM Linux To: Arnd Bergmann Cc: linux-arm-kernel@lists.infradead.org, Rob Clark , Sumit Semwal , LKML , "linux-media@vger.kernel.org" , DRI mailing list , Linaro MM SIG Mailman List , "linux-mm@kvack.org" , Linaro Kernel Mailman List , Tomasz Stanislawski , Robin Murphy , Marek Szyprowski , Daniel Vetter Subject: Re: [RFCv3 2/2] dma-buf: add helpers for sharing attacher constraints with dma-parms Message-ID: <20150203152204.GU8656@n2100.arm.linux.org.uk> References: <1422347154-15258-1-git-send-email-sumit.semwal@linaro.org> <4689826.8DDCrX2ZhK@wuerfel> <20150203144109.GR8656@n2100.arm.linux.org.uk> <4830208.H6zxrGlT1D@wuerfel> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4830208.H6zxrGlT1D@wuerfel> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 03, 2015 at 03:52:48PM +0100, Arnd Bergmann wrote: > On Tuesday 03 February 2015 14:41:09 Russell King - ARM Linux wrote: > > I'd go as far as saying that the "DMA API on top of IOMMU" is more > > intended to be for a system IOMMU for the bus in question, rather > > than a device-level IOMMU. > > > > If an IOMMU is part of a device, then the device should handle it > > (maybe via an abstraction) and not via the DMA API. The DMA API should > > be handing the bus addresses to the device driver which the device's > > IOMMU would need to generate. (In other words, in this circumstance, > > the DMA API shouldn't give you the device internal address.) > > Exactly. And the abstraction that people choose at the moment is the > iommu API, for better or worse. It makes a lot of sense to use this > API if the same iommu is used for other devices as well (which is > the case on Tegra and probably a lot of others). Unfortunately the > iommu API lacks support for cache management, and probably other things > as well, because this was not an issue for the original use case > (device assignment on KVM/x86). > > This could be done by adding explicit or implied cache management > to the IOMMU mapping interfaces, or by extending the dma-mapping > interfaces in a way that covers the use case of the device managing > its own address space, in addition to the existing coherent and > streaming interfaces. Don't we already have those in the DMA API? dma_sync_*() ? dma_map_sg() - sets up the system MMU and deals with initial cache coherency handling. Device IOMMU being the responsibility of the GPU driver. The GPU can then do dma_sync_*() on the scatterlist as is necessary to synchronise the cache coherency (while respecting the ownership rules - which are very important on ARM to follow as some sync()s are destructive to any dirty data in the CPU cache.) dma_unmap_sg() tears down the system MMU and deals with the final cache handling. Why do we need more DMA API interfaces? -- FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wi0-f179.google.com (mail-wi0-f179.google.com [209.85.212.179]) by kanga.kvack.org (Postfix) with ESMTP id 10F0C6B0073 for ; Tue, 3 Feb 2015 10:22:32 -0500 (EST) Received: by mail-wi0-f179.google.com with SMTP id l15so22517193wiw.0 for ; Tue, 03 Feb 2015 07:22:31 -0800 (PST) Received: from pandora.arm.linux.org.uk (pandora.arm.linux.org.uk. [2001:4d48:ad52:3201:214:fdff:fe10:1be6]) by mx.google.com with ESMTPS id pn2si8454217wjc.131.2015.02.03.07.22.29 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 03 Feb 2015 07:22:30 -0800 (PST) Date: Tue, 3 Feb 2015 15:22:05 +0000 From: Russell King - ARM Linux Subject: Re: [RFCv3 2/2] dma-buf: add helpers for sharing attacher constraints with dma-parms Message-ID: <20150203152204.GU8656@n2100.arm.linux.org.uk> References: <1422347154-15258-1-git-send-email-sumit.semwal@linaro.org> <4689826.8DDCrX2ZhK@wuerfel> <20150203144109.GR8656@n2100.arm.linux.org.uk> <4830208.H6zxrGlT1D@wuerfel> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4830208.H6zxrGlT1D@wuerfel> Sender: owner-linux-mm@kvack.org List-ID: To: Arnd Bergmann Cc: linux-arm-kernel@lists.infradead.org, Rob Clark , Sumit Semwal , LKML , "linux-media@vger.kernel.org" , DRI mailing list , Linaro MM SIG Mailman List , "linux-mm@kvack.org" , Linaro Kernel Mailman List , Tomasz Stanislawski , Robin Murphy , Marek Szyprowski , Daniel Vetter On Tue, Feb 03, 2015 at 03:52:48PM +0100, Arnd Bergmann wrote: > On Tuesday 03 February 2015 14:41:09 Russell King - ARM Linux wrote: > > I'd go as far as saying that the "DMA API on top of IOMMU" is more > > intended to be for a system IOMMU for the bus in question, rather > > than a device-level IOMMU. > > > > If an IOMMU is part of a device, then the device should handle it > > (maybe via an abstraction) and not via the DMA API. The DMA API should > > be handing the bus addresses to the device driver which the device's > > IOMMU would need to generate. (In other words, in this circumstance, > > the DMA API shouldn't give you the device internal address.) > > Exactly. And the abstraction that people choose at the moment is the > iommu API, for better or worse. It makes a lot of sense to use this > API if the same iommu is used for other devices as well (which is > the case on Tegra and probably a lot of others). Unfortunately the > iommu API lacks support for cache management, and probably other things > as well, because this was not an issue for the original use case > (device assignment on KVM/x86). > > This could be done by adding explicit or implied cache management > to the IOMMU mapping interfaces, or by extending the dma-mapping > interfaces in a way that covers the use case of the device managing > its own address space, in addition to the existing coherent and > streaming interfaces. Don't we already have those in the DMA API? dma_sync_*() ? dma_map_sg() - sets up the system MMU and deals with initial cache coherency handling. Device IOMMU being the responsibility of the GPU driver. The GPU can then do dma_sync_*() on the scatterlist as is necessary to synchronise the cache coherency (while respecting the ownership rules - which are very important on ARM to follow as some sync()s are destructive to any dirty data in the CPU cache.) dma_unmap_sg() tears down the system MMU and deals with the final cache handling. Why do we need more DMA API interfaces? -- FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org From mboxrd@z Thu Jan 1 00:00:00 1970 From: linux@arm.linux.org.uk (Russell King - ARM Linux) Date: Tue, 3 Feb 2015 15:22:05 +0000 Subject: [RFCv3 2/2] dma-buf: add helpers for sharing attacher constraints with dma-parms In-Reply-To: <4830208.H6zxrGlT1D@wuerfel> References: <1422347154-15258-1-git-send-email-sumit.semwal@linaro.org> <4689826.8DDCrX2ZhK@wuerfel> <20150203144109.GR8656@n2100.arm.linux.org.uk> <4830208.H6zxrGlT1D@wuerfel> Message-ID: <20150203152204.GU8656@n2100.arm.linux.org.uk> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, Feb 03, 2015 at 03:52:48PM +0100, Arnd Bergmann wrote: > On Tuesday 03 February 2015 14:41:09 Russell King - ARM Linux wrote: > > I'd go as far as saying that the "DMA API on top of IOMMU" is more > > intended to be for a system IOMMU for the bus in question, rather > > than a device-level IOMMU. > > > > If an IOMMU is part of a device, then the device should handle it > > (maybe via an abstraction) and not via the DMA API. The DMA API should > > be handing the bus addresses to the device driver which the device's > > IOMMU would need to generate. (In other words, in this circumstance, > > the DMA API shouldn't give you the device internal address.) > > Exactly. And the abstraction that people choose at the moment is the > iommu API, for better or worse. It makes a lot of sense to use this > API if the same iommu is used for other devices as well (which is > the case on Tegra and probably a lot of others). Unfortunately the > iommu API lacks support for cache management, and probably other things > as well, because this was not an issue for the original use case > (device assignment on KVM/x86). > > This could be done by adding explicit or implied cache management > to the IOMMU mapping interfaces, or by extending the dma-mapping > interfaces in a way that covers the use case of the device managing > its own address space, in addition to the existing coherent and > streaming interfaces. Don't we already have those in the DMA API? dma_sync_*() ? dma_map_sg() - sets up the system MMU and deals with initial cache coherency handling. Device IOMMU being the responsibility of the GPU driver. The GPU can then do dma_sync_*() on the scatterlist as is necessary to synchronise the cache coherency (while respecting the ownership rules - which are very important on ARM to follow as some sync()s are destructive to any dirty data in the CPU cache.) dma_unmap_sg() tears down the system MMU and deals with the final cache handling. Why do we need more DMA API interfaces? -- FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Russell King - ARM Linux Subject: Re: [RFCv3 2/2] dma-buf: add helpers for sharing attacher constraints with dma-parms Date: Tue, 3 Feb 2015 15:22:05 +0000 Message-ID: <20150203152204.GU8656@n2100.arm.linux.org.uk> References: <1422347154-15258-1-git-send-email-sumit.semwal@linaro.org> <4689826.8DDCrX2ZhK@wuerfel> <20150203144109.GR8656@n2100.arm.linux.org.uk> <4830208.H6zxrGlT1D@wuerfel> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from pandora.arm.linux.org.uk (pandora.arm.linux.org.uk [78.32.30.218]) by gabe.freedesktop.org (Postfix) with ESMTP id 4431B89E38 for ; Tue, 3 Feb 2015 07:22:28 -0800 (PST) Content-Disposition: inline In-Reply-To: <4830208.H6zxrGlT1D@wuerfel> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Arnd Bergmann Cc: Linaro Kernel Mailman List , Robin Murphy , LKML , DRI mailing list , Linaro MM SIG Mailman List , "linux-mm@kvack.org" , Marek Szyprowski , Tomasz Stanislawski , linux-arm-kernel@lists.infradead.org, "linux-media@vger.kernel.org" List-Id: dri-devel@lists.freedesktop.org T24gVHVlLCBGZWIgMDMsIDIwMTUgYXQgMDM6NTI6NDhQTSArMDEwMCwgQXJuZCBCZXJnbWFubiB3 cm90ZToKPiBPbiBUdWVzZGF5IDAzIEZlYnJ1YXJ5IDIwMTUgMTQ6NDE6MDkgUnVzc2VsbCBLaW5n IC0gQVJNIExpbnV4IHdyb3RlOgo+ID4gSSdkIGdvIGFzIGZhciBhcyBzYXlpbmcgdGhhdCB0aGUg IkRNQSBBUEkgb24gdG9wIG9mIElPTU1VIiBpcyBtb3JlCj4gPiBpbnRlbmRlZCB0byBiZSBmb3Ig YSBzeXN0ZW0gSU9NTVUgZm9yIHRoZSBidXMgaW4gcXVlc3Rpb24sIHJhdGhlcgo+ID4gdGhhbiBh IGRldmljZS1sZXZlbCBJT01NVS4KPiA+IAo+ID4gSWYgYW4gSU9NTVUgaXMgcGFydCBvZiBhIGRl dmljZSwgdGhlbiB0aGUgZGV2aWNlIHNob3VsZCBoYW5kbGUgaXQKPiA+IChtYXliZSB2aWEgYW4g YWJzdHJhY3Rpb24pIGFuZCBub3QgdmlhIHRoZSBETUEgQVBJLiAgVGhlIERNQSBBUEkgc2hvdWxk Cj4gPiBiZSBoYW5kaW5nIHRoZSBidXMgYWRkcmVzc2VzIHRvIHRoZSBkZXZpY2UgZHJpdmVyIHdo aWNoIHRoZSBkZXZpY2Uncwo+ID4gSU9NTVUgd291bGQgbmVlZCB0byBnZW5lcmF0ZS4gIChJbiBv dGhlciB3b3JkcywgaW4gdGhpcyBjaXJjdW1zdGFuY2UsCj4gPiB0aGUgRE1BIEFQSSBzaG91bGRu J3QgZ2l2ZSB5b3UgdGhlIGRldmljZSBpbnRlcm5hbCBhZGRyZXNzLikKPiAKPiBFeGFjdGx5LiBB bmQgdGhlIGFic3RyYWN0aW9uIHRoYXQgcGVvcGxlIGNob29zZSBhdCB0aGUgbW9tZW50IGlzIHRo ZQo+IGlvbW11IEFQSSwgZm9yIGJldHRlciBvciB3b3JzZS4gSXQgbWFrZXMgYSBsb3Qgb2Ygc2Vu c2UgdG8gdXNlIHRoaXMKPiBBUEkgaWYgdGhlIHNhbWUgaW9tbXUgaXMgdXNlZCBmb3Igb3RoZXIg ZGV2aWNlcyBhcyB3ZWxsICh3aGljaCBpcwo+IHRoZSBjYXNlIG9uIFRlZ3JhIGFuZCBwcm9iYWJs eSBhIGxvdCBvZiBvdGhlcnMpLiBVbmZvcnR1bmF0ZWx5IHRoZQo+IGlvbW11IEFQSSBsYWNrcyBz dXBwb3J0IGZvciBjYWNoZSBtYW5hZ2VtZW50LCBhbmQgcHJvYmFibHkgb3RoZXIgdGhpbmdzCj4g YXMgd2VsbCwgYmVjYXVzZSB0aGlzIHdhcyBub3QgYW4gaXNzdWUgZm9yIHRoZSBvcmlnaW5hbCB1 c2UgY2FzZQo+IChkZXZpY2UgYXNzaWdubWVudCBvbiBLVk0veDg2KS4KPiAKPiBUaGlzIGNvdWxk IGJlIGRvbmUgYnkgYWRkaW5nIGV4cGxpY2l0IG9yIGltcGxpZWQgY2FjaGUgbWFuYWdlbWVudAo+ IHRvIHRoZSBJT01NVSBtYXBwaW5nIGludGVyZmFjZXMsIG9yIGJ5IGV4dGVuZGluZyB0aGUgZG1h LW1hcHBpbmcKPiBpbnRlcmZhY2VzIGluIGEgd2F5IHRoYXQgY292ZXJzIHRoZSB1c2UgY2FzZSBv ZiB0aGUgZGV2aWNlIG1hbmFnaW5nCj4gaXRzIG93biBhZGRyZXNzIHNwYWNlLCBpbiBhZGRpdGlv biB0byB0aGUgZXhpc3RpbmcgY29oZXJlbnQgYW5kCj4gc3RyZWFtaW5nIGludGVyZmFjZXMuCgpE b24ndCB3ZSBhbHJlYWR5IGhhdmUgdGhvc2UgaW4gdGhlIERNQSBBUEk/ICBkbWFfc3luY18qKCkg PwoKZG1hX21hcF9zZygpIC0gc2V0cyB1cCB0aGUgc3lzdGVtIE1NVSBhbmQgZGVhbHMgd2l0aCBp bml0aWFsIGNhY2hlCmNvaGVyZW5jeSBoYW5kbGluZy4gIERldmljZSBJT01NVSBiZWluZyB0aGUg cmVzcG9uc2liaWxpdHkgb2YgdGhlCkdQVSBkcml2ZXIuCgpUaGUgR1BVIGNhbiB0aGVuIGRvIGRt YV9zeW5jXyooKSBvbiB0aGUgc2NhdHRlcmxpc3QgYXMgaXMgbmVjZXNzYXJ5CnRvIHN5bmNocm9u aXNlIHRoZSBjYWNoZSBjb2hlcmVuY3kgKHdoaWxlIHJlc3BlY3RpbmcgdGhlIG93bmVyc2hpcApy dWxlcyAtIHdoaWNoIGFyZSB2ZXJ5IGltcG9ydGFudCBvbiBBUk0gdG8gZm9sbG93IGFzIHNvbWUg c3luYygpcyBhcmUKZGVzdHJ1Y3RpdmUgdG8gYW55IGRpcnR5IGRhdGEgaW4gdGhlIENQVSBjYWNo ZS4pCgpkbWFfdW5tYXBfc2coKSB0ZWFycyBkb3duIHRoZSBzeXN0ZW0gTU1VIGFuZCBkZWFscyB3 aXRoIHRoZSBmaW5hbCBjYWNoZQpoYW5kbGluZy4KCldoeSBkbyB3ZSBuZWVkIG1vcmUgRE1BIEFQ SSBpbnRlcmZhY2VzPwoKLS0gCkZUVEMgYnJvYWRiYW5kIGZvciAwLjhtaWxlIGxpbmU6IGN1cnJl bnRseSBhdCAxMC41TWJwcyBkb3duIDQwMGticHMgdXAKYWNjb3JkaW5nIHRvIHNwZWVkdGVzdC5u ZXQuCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1k ZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8v bGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==