From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from wolverine02.qualcomm.com ([199.106.114.251]:51449 "EHLO wolverine02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932819AbbBQHLq (ORCPT ); Tue, 17 Feb 2015 02:11:46 -0500 Date: Tue, 17 Feb 2015 12:41:29 +0530 From: Rajkumar To: CC: Subject: Re: [PATCH v2 1/2] ath10k: Bypass PLL setting on target init for QCA9888 Message-ID: <20150217071125.GA27497@qca.qualcomm.com> (sfid-20150217_081236_478149_00B18784) References: <1423460814-2767-1-git-send-email-rmanohar@qti.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" In-Reply-To: <1423460814-2767-1-git-send-email-rmanohar@qti.qualcomm.com> Sender: linux-wireless-owner@vger.kernel.org List-ID: On Mon, Feb 09, 2015 at 11:16:53AM +0530, Rajkumar Manoharan wrote: > Some of of qca988x solutions are having global reset issue > during target initialization. Bypassing PLL setting before > downloading firmware and letting the SoC run on REF_CLK is fixing > the problem. Corresponding firmware change is also needed to set > the clock source once the target is initialized. Since 10.2.4 > firmware is having this ROM patch, applying skip_clock_init only > for 10.2.4 firmware versions. > > Signed-off-by: Rajkumar Manoharan > --- > drivers/net/wireless/ath/ath10k/core.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > Kalle, Its been pending for a while. Shall I resend this series? -Rajkumar From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from wolverine01.qualcomm.com ([199.106.114.254]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YNcKG-0004hx-Um for ath10k@lists.infradead.org; Tue, 17 Feb 2015 07:12:10 +0000 Date: Tue, 17 Feb 2015 12:41:29 +0530 From: Rajkumar Subject: Re: [PATCH v2 1/2] ath10k: Bypass PLL setting on target init for QCA9888 Message-ID: <20150217071125.GA27497@qca.qualcomm.com> References: <1423460814-2767-1-git-send-email-rmanohar@qti.qualcomm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1423460814-2767-1-git-send-email-rmanohar@qti.qualcomm.com> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "ath10k" Errors-To: ath10k-bounces+kvalo=adurom.com@lists.infradead.org To: ath10k@lists.infradead.org Cc: linux-wireless@vger.kernel.org On Mon, Feb 09, 2015 at 11:16:53AM +0530, Rajkumar Manoharan wrote: > Some of of qca988x solutions are having global reset issue > during target initialization. Bypassing PLL setting before > downloading firmware and letting the SoC run on REF_CLK is fixing > the problem. Corresponding firmware change is also needed to set > the clock source once the target is initialized. Since 10.2.4 > firmware is having this ROM patch, applying skip_clock_init only > for 10.2.4 firmware versions. > > Signed-off-by: Rajkumar Manoharan > --- > drivers/net/wireless/ath/ath10k/core.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > Kalle, Its been pending for a while. Shall I resend this series? -Rajkumar _______________________________________________ ath10k mailing list ath10k@lists.infradead.org http://lists.infradead.org/mailman/listinfo/ath10k