From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752376AbbBTTnO (ORCPT ); Fri, 20 Feb 2015 14:43:14 -0500 Received: from e06smtp10.uk.ibm.com ([195.75.94.106]:47033 "EHLO e06smtp10.uk.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752165AbbBTTnM (ORCPT ); Fri, 20 Feb 2015 14:43:12 -0500 Date: Fri, 20 Feb 2015 20:43:03 +0100 From: Michael Mueller To: Alexander Graf Cc: "qemu-devel@nongnu.org" , "kvm@vger.kernel.org" , "linux-s390@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Gleb Natapov , Christian Borntraeger , "Jason J. Herne" , Cornelia Huck , Paolo Bonzini , Andreas Faerber , Richard Henderson Subject: Re: [Qemu-devel] [RFC PATCH v2 04/15] cpu-model/s390: Introduce S390 CPU models Message-ID: <20150220204303.4f20f54e@bee> In-Reply-To: <2049D8E0-FE03-4E84-94D0-E23B695BC865@suse.de> References: <1424183053-4310-1-git-send-email-mimu@linux.vnet.ibm.com> <1424183053-4310-5-git-send-email-mimu@linux.vnet.ibm.com> <54E73C8F.7000202@suse.de> <20150220160046.4743acc8@bee> <89E3550E-9E2B-4D95-A809-B7C64EBCD7C5@suse.de> <20150220164944.4eb4eeb3@bee> <54E76790.1030700@suse.de> <20150220183748.45b32e11@bee> <2049D8E0-FE03-4E84-94D0-E23B695BC865@suse.de> Organization: IBM X-Mailer: Claws Mail 3.9.3 (GTK+ 2.24.23; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15022019-0041-0000-0000-0000035255D7 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 20 Feb 2015 18:50:20 +0100 Alexander Graf wrote: > > > > > Am 20.02.2015 um 18:37 schrieb Michael Mueller : > > > > On Fri, 20 Feb 2015 17:57:52 +0100 > > Alexander Graf wrote: > > > >> Because all CPUs we have in our list only expose 128 bits? > > > > Here a STFLE result on a EC12 GA2, already more than 128 bits... Is that model on the list? > > If that model has 3 elements, yes, the array should span 3. > > I hope it's in the list. Every model wecare about should be, no? > On my list? Yes! > > > > [mimu@p57lp59 s390xfac]$ ./s390xfac -b > > fac[0] = 0xfbfffffbfcfff840 > > fac[1] = 0xffde000000000000 > > fac[2] = 0x1800000000000000 > >> > >>> I want to have this independent from a future machine of the z/Arch. The kernel stores the > >>> full facility set, KVM does and there is no good reason for QEMU not to do. If other > >>> accelerators decide to just implement 64 or 128 bits of facilities that's ok... > >> > >> So you want to support CPUs that are not part of the list? > > > > The architecture at least defines more than 2 or 3. Do you want me to limit it to an arbitrary > > size?. Only in QEMU or also in the KVM interface? > > Only internally in QEMU. The kvm interface should definitely be as big as the spec allows! Right, now we're on the same page again. That can be taken in consideration. ... Although it's just and optimization. :-) Michael > > Alex > > > > > Thanks > > Michael > > > From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47682) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOtTm-0006xd-8A for qemu-devel@nongnu.org; Fri, 20 Feb 2015 14:43:15 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YOtTi-0007pz-VY for qemu-devel@nongnu.org; Fri, 20 Feb 2015 14:43:14 -0500 Received: from e06smtp17.uk.ibm.com ([195.75.94.113]:46994) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOtTi-0007pr-MK for qemu-devel@nongnu.org; Fri, 20 Feb 2015 14:43:10 -0500 Received: from /spool/local by e06smtp17.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 20 Feb 2015 19:43:08 -0000 Received: from b06cxnps4075.portsmouth.uk.ibm.com (d06relay12.portsmouth.uk.ibm.com [9.149.109.197]) by d06dlp01.portsmouth.uk.ibm.com (Postfix) with ESMTP id 73EE617D8042 for ; Fri, 20 Feb 2015 19:43:21 +0000 (GMT) Received: from d06av07.portsmouth.uk.ibm.com (d06av07.portsmouth.uk.ibm.com [9.149.37.248]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t1KJh69I8847828 for ; Fri, 20 Feb 2015 19:43:06 GMT Received: from d06av07.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av07.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t1KJh6Lw007966 for ; Fri, 20 Feb 2015 14:43:06 -0500 Date: Fri, 20 Feb 2015 20:43:03 +0100 From: Michael Mueller Message-ID: <20150220204303.4f20f54e@bee> In-Reply-To: <2049D8E0-FE03-4E84-94D0-E23B695BC865@suse.de> References: <1424183053-4310-1-git-send-email-mimu@linux.vnet.ibm.com> <1424183053-4310-5-git-send-email-mimu@linux.vnet.ibm.com> <54E73C8F.7000202@suse.de> <20150220160046.4743acc8@bee> <89E3550E-9E2B-4D95-A809-B7C64EBCD7C5@suse.de> <20150220164944.4eb4eeb3@bee> <54E76790.1030700@suse.de> <20150220183748.45b32e11@bee> <2049D8E0-FE03-4E84-94D0-E23B695BC865@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC PATCH v2 04/15] cpu-model/s390: Introduce S390 CPU models List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: "linux-s390@vger.kernel.org" , "kvm@vger.kernel.org" , Gleb Natapov , "qemu-devel@nongnu.org" , "linux-kernel@vger.kernel.org" , Christian Borntraeger , "Jason J. Herne" , Cornelia Huck , Paolo Bonzini , Andreas Faerber , Richard Henderson On Fri, 20 Feb 2015 18:50:20 +0100 Alexander Graf wrote: > > > > > Am 20.02.2015 um 18:37 schrieb Michael Mueller : > > > > On Fri, 20 Feb 2015 17:57:52 +0100 > > Alexander Graf wrote: > > > >> Because all CPUs we have in our list only expose 128 bits? > > > > Here a STFLE result on a EC12 GA2, already more than 128 bits... Is that model on the list? > > If that model has 3 elements, yes, the array should span 3. > > I hope it's in the list. Every model wecare about should be, no? > On my list? Yes! > > > > [mimu@p57lp59 s390xfac]$ ./s390xfac -b > > fac[0] = 0xfbfffffbfcfff840 > > fac[1] = 0xffde000000000000 > > fac[2] = 0x1800000000000000 > >> > >>> I want to have this independent from a future machine of the z/Arch. The kernel stores the > >>> full facility set, KVM does and there is no good reason for QEMU not to do. If other > >>> accelerators decide to just implement 64 or 128 bits of facilities that's ok... > >> > >> So you want to support CPUs that are not part of the list? > > > > The architecture at least defines more than 2 or 3. Do you want me to limit it to an arbitrary > > size?. Only in QEMU or also in the KVM interface? > > Only internally in QEMU. The kvm interface should definitely be as big as the spec allows! Right, now we're on the same page again. That can be taken in consideration. ... Although it's just and optimization. :-) Michael > > Alex > > > > > Thanks > > Michael > > >