From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Date: Sat, 28 Feb 2015 13:53:12 +0000 Subject: [U-Boot] [PATCH v4 04/14] ARM: Factor out reusable psci_cpu_entry In-Reply-To: <5e62f5242de46bee80f6b12999125a296443a45d.1425043693.git.jan.kiszka@siemens.com> References: <5e62f5242de46bee80f6b12999125a296443a45d.1425043693.git.jan.kiszka@siemens.com> Message-ID: <20150228135312.0d493843@arm.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Fri, 27 Feb 2015 13:28:03 +0000 Jan Kiszka wrote: > _sunxi_cpu_entry can be converted completely into a reusable > psci_cpu_entry. Tegra124 will use it as well. > > CC: Marc Zyngier > Signed-off-by: Jan Kiszka > --- > arch/arm/cpu/armv7/psci.S | 18 ++++++++++++++++++ > arch/arm/cpu/armv7/sunxi/psci.S | 20 ++------------------ > 2 files changed, 20 insertions(+), 18 deletions(-) > > diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S > index d688607..315c20b 100644 > --- a/arch/arm/cpu/armv7/psci.S > +++ b/arch/arm/cpu/armv7/psci.S > @@ -170,4 +170,22 @@ ENTRY(psci_cpu_off_common) > bx lr > ENDPROC(psci_cpu_off_common) > > +ENTRY(psci_cpu_entry) > + @ Set SMP bit > + mrc p15, 0, r0, c1, c0, 1 @ ACTLR > + orr r0, r0, #(1 << 6) @ Set SMP bit > + mcr p15, 0, r0, c1, c0, 1 @ ACTLR > + isb > + > + bl _nonsec_init > + > + adr r0, _psci_target_pc > + ldr r0, [r0] > + b _do_nonsec_entry > +ENDPROC(psci_cpu_entry) I'd add a *big* comment at the top of this. ACTLR is implementation dependent, and while sticking the SMP bit at this location is fairly common among ARM cores, it is by no mean a strong guarantee (this is not an architectural feature). I'd recommend making it override-able. > +.globl _psci_target_pc > +_psci_target_pc: > + .word 0 > + > .popsection > diff --git a/arch/arm/cpu/armv7/sunxi/psci.S > b/arch/arm/cpu/armv7/sunxi/psci.S index bb3d4ef..9ea3ce8 100644 > --- a/arch/arm/cpu/armv7/sunxi/psci.S > +++ b/arch/arm/cpu/armv7/sunxi/psci.S > @@ -139,7 +139,7 @@ out: mcr p15, 0, r7, c1, c1, 0 > @ r2 = target PC > .globl psci_cpu_on > psci_cpu_on: > - adr r0, _target_pc > + ldr r0, =_psci_target_pc > str r2, [r0] > dsb > > @@ -151,7 +151,7 @@ psci_cpu_on: > mov r4, #1 > lsl r4, r4, r1 > > - adr r6, _sunxi_cpu_entry > + ldr r6, =psci_cpu_entry > str r6, [r0, #0x1a4] @ PRIVATE_REG (boot vector) > > @ Assert reset on target CPU > @@ -197,22 +197,6 @@ psci_cpu_on: > mov r0, #ARM_PSCI_RET_SUCCESS @ Return > PSCI_RET_SUCCESS mov pc, lr > > -_target_pc: > - .word 0 > - > -_sunxi_cpu_entry: > - @ Set SMP bit > - mrc p15, 0, r0, c1, c0, 1 > - orr r0, r0, #0x40 > - mcr p15, 0, r0, c1, c0, 1 > - isb > - > - bl _nonsec_init > - > - adr r0, _target_pc > - ldr r0, [r0] > - b _do_nonsec_entry > - > .globl psci_cpu_off > psci_cpu_off: > bl psci_cpu_off_common -- Jazz is not dead. It just smells funny.