From mboxrd@z Thu Jan 1 00:00:00 1970 From: Russell King - ARM Linux Subject: Re: [PATCH 6/9] ARM: dt: dove: add Dove PMU DT entry to dove.dtsi Date: Fri, 13 Mar 2015 12:33:24 +0000 Message-ID: <20150313123324.GH8656@n2100.arm.linux.org.uk> References: <20150312183020.GU8656@n2100.arm.linux.org.uk> <20150313133038.0a3ae8d1@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20150313133038.0a3ae8d1-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Thomas Petazzoni Cc: Andrew Lunn , Jason Cooper , "Rafael J. Wysocki" , Sebastian Hesselbarth , Mark Rutland , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Pawel Moll , Ian Campbell , Rob Herring , Kumar Gala , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org On Fri, Mar 13, 2015 at 01:30:38PM +0100, Thomas Petazzoni wrote: > Dear Russell King, > > On Thu, 12 Mar 2015 18:31:21 +0000, Russell King wrote: > > > + pmu: power-management@d0000 { > > + compatible = "marvell,dove-pmu"; > > + reg = <0xd0000 0x8000>, <0xd8000 0x8000>; > > If I'm not wrong, the registers of the RTC are at 0xd8500, which is > also covered by this new pmu node. It does work because you're using > of_iomap(), but it isn't really ideal. > > Maybe some sort of syscon/regmap thing should be used? Please look at the locking that would require and the locking required for PM domains (and as I've previously explained, apparently the hardware requires a specific sequence of writes.) -- FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: linux@arm.linux.org.uk (Russell King - ARM Linux) Date: Fri, 13 Mar 2015 12:33:24 +0000 Subject: [PATCH 6/9] ARM: dt: dove: add Dove PMU DT entry to dove.dtsi In-Reply-To: <20150313133038.0a3ae8d1@free-electrons.com> References: <20150312183020.GU8656@n2100.arm.linux.org.uk> <20150313133038.0a3ae8d1@free-electrons.com> Message-ID: <20150313123324.GH8656@n2100.arm.linux.org.uk> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Mar 13, 2015 at 01:30:38PM +0100, Thomas Petazzoni wrote: > Dear Russell King, > > On Thu, 12 Mar 2015 18:31:21 +0000, Russell King wrote: > > > + pmu: power-management at d0000 { > > + compatible = "marvell,dove-pmu"; > > + reg = <0xd0000 0x8000>, <0xd8000 0x8000>; > > If I'm not wrong, the registers of the RTC are at 0xd8500, which is > also covered by this new pmu node. It does work because you're using > of_iomap(), but it isn't really ideal. > > Maybe some sort of syscon/regmap thing should be used? Please look at the locking that would require and the locking required for PM domains (and as I've previously explained, apparently the hardware requires a specific sequence of writes.) -- FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net.