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Date: Wed, 18 Mar 2015 10:08:55 -0700
From: David Cohen <david.a.cohen@linux.intel.com>
To: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: Felipe Balbi <balbi@ti.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Stephen Boyd <sboyd@codeaurora.org>,
        Baolu Lu <baolu.lu@linux.intel.com>, linux-usb@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCHv2 09/12] usb: dwc3: pci: add quirk for Baytrails
Message-ID: <20150318170855.GB25477@psi-dev26.jf.intel.com>
References: <1426682433-133813-1-git-send-email-heikki.krogerus@linux.intel.com>
 <1426682433-133813-10-git-send-email-heikki.krogerus@linux.intel.com>
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Hi Heikki,

On Wed, Mar 18, 2015 at 02:40:30PM +0200, Heikki Krogerus wrote:
> On some BYT platforms the USB2 PHY needs to be put into
> operational mode by the controller driver with GPIOs
> controlling the PHYs reset and cs signals.
> 
> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
> ---
>  drivers/usb/dwc3/dwc3-pci.c | 36 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
> index b773fb5..01cfdbd 100644
> --- a/drivers/usb/dwc3/dwc3-pci.c
> +++ b/drivers/usb/dwc3/dwc3-pci.c
> @@ -21,6 +21,8 @@
>  #include <linux/slab.h>
>  #include <linux/pci.h>
>  #include <linux/platform_device.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/acpi.h>
>  
>  #include "platform_data.h"
>  
> @@ -31,6 +33,15 @@
>  #define PCI_DEVICE_ID_INTEL_SPTLP	0x9d30
>  #define PCI_DEVICE_ID_INTEL_SPTH	0xa130
>  
> +static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
> +static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
> +
> +static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
> +	{ "reset-gpios", &reset_gpios, 1 },
> +	{ "cs-gpios", &cs_gpios, 1 },
> +	{ },
> +};
> +
>  static int dwc3_pci_quirks(struct pci_dev *pdev)
>  {
>  	if (pdev->vendor == PCI_VENDOR_ID_AMD &&
> @@ -65,6 +76,31 @@ static int dwc3_pci_quirks(struct pci_dev *pdev)
>  						sizeof(pdata));
>  	}
>  
> +	if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
> +	    pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
> +		struct gpio_desc *gpio;
> +
> +		acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev->dev),
> +					  acpi_dwc3_byt_gpios);
> +
> +		gpio = gpiod_get(&pdev->dev, "reset");
> +		if (IS_ERR(gpio))
> +			return 0;
> +
> +		/* These GPIOs will turn on the USB2 PHY */
> +		gpiod_direction_output(gpio, 0);
> +		gpiod_set_value_cansleep(gpio, 1);
> +		gpiod_put(gpio);
> +
> +		gpio = gpiod_get(&pdev->dev, "cs");

CS GPIO should be handled before RESET.

BR, David

> +		if (!IS_ERR(gpio)) {
> +			gpiod_direction_output(gpio, 0);
> +			gpiod_set_value_cansleep(gpio, 1);
> +			gpiod_put(gpio);
> +		}
> +		msleep(10);
> +	}
> +
>  	return 0;
>  }
>  
> -- 
> 2.1.4
>