From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48130) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ycd6m-0002ng-3v for qemu-devel@nongnu.org; Mon, 30 Mar 2015 13:04:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ycd6j-0003gv-Da for qemu-devel@nongnu.org; Mon, 30 Mar 2015 13:04:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49850) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ycd6j-0003gn-7s for qemu-devel@nongnu.org; Mon, 30 Mar 2015 13:04:13 -0400 Date: Mon, 30 Mar 2015 18:04:07 +0100 From: "Dr. David Alan Gilbert" Message-ID: <20150330170406.GF2474@work-vm> References: <1424883128-9841-1-git-send-email-dgilbert@redhat.com> <1424883128-9841-24-git-send-email-dgilbert@redhat.com> <20150313012652.GB11973@voom.redhat.com> <20150313111905.GC2486@work-vm> <20150316062355.GG5741@voom.redhat.com> <20150318175951.GL2355@work-vm> <20150319041830.GU5741@voom.redhat.com> <20150319093330.GA2409@work-vm> <20150323022042.GF25043@voom.fritz.box> <5519072A.5060407@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5519072A.5060407@redhat.com> Subject: Re: [Qemu-devel] [PATCH v5 23/45] migrate_start_postcopy: Command to trigger transition to postcopy List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: aarcange@redhat.com, yamahata@private.email.ne.jp, quintela@redhat.com, qemu-devel@nongnu.org, amit.shah@redhat.com, yanghy@cn.fujitsu.com, David Gibson * Paolo Bonzini (pbonzini@redhat.com) wrote: > > > On 23/03/2015 03:20, David Gibson wrote: > >>> 1) There's no barrier after the write, so there's no guarantee > >>> the other thread will eventually see it (in practice we've got > >>> other pthread ops we take so we will get a barrier somewhere, > >>> and most CPUs eventually do propagate the store). > > Sorry, I should have been clearer. If you need a memory barrier, > > by all means include a memory barrier. But that should be > > explicit: atomic set/read operations often include barriers, but > > it's not obvious which side will include what barrier. > > Memory barriers are not needed here. The variable is set > independently from every other set. There's no ordering. > > atomic_read/atomic_set do not provide sequential consistency. That's > ensured instead by atomic_mb_read/atomic_mb_set (and you're right that > it's not obvious which side will include barriers, so you have to use > the two together). > > >>> 2) The read side could legally be optimised out of the loop by > >>> the compiler. (but in practice wont be because compilers won't > >>> optimise that far). > > That one's a trickier question. Compilers are absolutely capable > > of optimizing that far, *but* the C rules about when it's allowed > > to assume in-memory values remain unchanged are pretty > > conservative. I think any function call in the loop will require > > it to reload the value, for example. That said, a (compiler only) > > memory barrier might be appropriate to ensure that reload. > > That's exactly what atomic_read provides. So does that say I need the atomic_read but not the atomic_write - which seems a bit weird, but I think only due to the naming. Dave > > Paolo -- Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK