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From: Daniel Vetter <daniel@ffwll.ch>
To: Anuj Phogat <anuj.phogat@gmail.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/5] i965/skl: Add macros for Yf/Ys tiling formats
Date: Tue, 31 Mar 2015 15:17:22 +0200	[thread overview]
Message-ID: <20150331131722.GJ6354@phenom.ffwll.local> (raw)
In-Reply-To: <1427749208-8961-2-git-send-email-anuj.phogat@gmail.com>

On Mon, Mar 30, 2015 at 02:00:04PM -0700, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
> ---
>  include/drm/i915_drm.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
> index ded43b1..a6c167c 100644
> --- a/include/drm/i915_drm.h
> +++ b/include/drm/i915_drm.h
> @@ -842,6 +842,8 @@ struct drm_i915_gem_caching {
>  #define I915_TILING_NONE	0
>  #define I915_TILING_X		1
>  #define I915_TILING_Y		2
> +#define I915_TILING_YF          3
> +#define I915_TILING_YS          4

This is based on an old version of the Yf/Ys tiling patches which have not
been merged, so nack.

When you update the kernel headers in libdrm, _always_ use

$ make headers_install

from kernel sources and then copy over the headers unchanged to libdrm.
Never handedit i915_drm.h.
-Daniel

>  
>  #define I915_BIT_6_SWIZZLE_NONE		0
>  #define I915_BIT_6_SWIZZLE_9		1
> -- 
> 2.3.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-03-31 13:15 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-30 21:00 [PATCH 0/5] i965/skl: Add YF/YS tiling support Anuj Phogat
2015-03-30 21:00 ` [PATCH 1/5] i965/skl: Add macros for Yf/Ys tiling formats Anuj Phogat
2015-03-31 13:17   ` Daniel Vetter [this message]
2015-03-31 22:16     ` Anuj Phogat
2015-03-30 21:00 ` [PATCH 2/5] i965/skl: Move tile_width computations out of drm_intel_gem_bo_tile_pitch Anuj Phogat
2015-03-30 21:00 ` [PATCH 3/5] i965/skl: Set tile width and height for YF/YS tiling Anuj Phogat
2015-03-31  8:36   ` Tvrtko Ursulin
2015-03-30 21:00 ` [PATCH 4/5] Align YS tile base address to 64KB Anuj Phogat
2015-03-31 14:26   ` Damien Lespiau
2015-03-31 17:49     ` Anuj Phogat
2015-03-31 17:57       ` Damien Lespiau
2015-04-01  6:11         ` Daniel Vetter
2015-04-01 16:31           ` Anuj Phogat
2015-03-30 21:00 ` [PATCH 5/5] build: Bump the version to 2.4.61 Anuj Phogat
2015-03-31 14:28   ` Damien Lespiau
2015-03-31 17:51     ` Anuj Phogat
2015-04-01  6:13       ` Daniel Vetter

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