From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33010) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YgBnA-0006Ix-AN for qemu-devel@nongnu.org; Thu, 09 Apr 2015 08:42:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YgBn4-00047w-Vz for qemu-devel@nongnu.org; Thu, 09 Apr 2015 08:42:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46555) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YgBn4-00047a-OG for qemu-devel@nongnu.org; Thu, 09 Apr 2015 08:42:38 -0400 Date: Thu, 9 Apr 2015 14:42:21 +0200 From: Igor Mammedov Message-ID: <20150409144221.19cc2090@nial.brq.redhat.com> In-Reply-To: <1428055432-12120-5-git-send-email-zhaoshenglong@huawei.com> References: <1428055432-12120-1-git-send-email-zhaoshenglong@huawei.com> <1428055432-12120-5-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v4 04/20] hw/acpi/aml-build: Add aml_memory32_fixed() term List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Shannon Zhao Cc: peter.maydell@linaro.org, hangaohuai@huawei.com, mst@redhat.com, a.spyridakis@virtualopensystems.com, claudio.fontana@huawei.com, qemu-devel@nongnu.org, peter.huangpeng@huawei.com, hanjun.guo@linaro.org, msalter@redhat.com, pbonzini@redhat.com, lersek@redhat.com, christoffer.dall@linaro.org, shannon.zhao@linaro.org On Fri, 3 Apr 2015 18:03:36 +0800 Shannon Zhao wrote: > From: Shannon Zhao > > Add aml_memory32_fixed() for describing device mmio region in resource template. > These can be used to generating DSDT table for ACPI on ARM. > > Signed-off-by: Shannon Zhao > Signed-off-by: Shannon Zhao > --- > hw/acpi/aml-build.c | 22 ++++++++++++++++++++++ > include/hw/acpi/aml-build.h | 1 + > 2 files changed, 23 insertions(+) > > diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c > index 8d01959..fefe7c7 100644 > --- a/hw/acpi/aml-build.c > +++ b/hw/acpi/aml-build.c > @@ -505,6 +505,28 @@ Aml *aml_call4(const char *method, Aml *arg1, Aml *arg2, Aml *arg3, Aml *arg4) > return var; > } > > +/* > + * ACPI 1.0: 6.4.3.4 Memory32Fixed (Memory Resource Descriptor Macro) > + */ > +Aml *aml_memory32_fixed(uint64_t addr, uint64_t size, uint8_t rw_flag) perhaps s/uint64_t/uint32_t/ don't use uintXX for bitfields if could be helped. Probably in this case existing AmlReadAndWrite enum should be used. > +{ > + Aml *var = aml_alloc(); > + build_append_byte(var->buf, 0x86); /* Memory32Fixed Resource Descriptor */ > + build_append_byte(var->buf, 9); /* Length, bits[7:0] value = 9 */ > + build_append_byte(var->buf, 0); /* Length, bits[15:8] value = 0 */ > + build_append_byte(var->buf, rw_flag); /* Write status, 1 rw 0 ro */ > + build_append_byte(var->buf, addr & 0xff); /* Range base address bits[7:0] */ > + build_append_byte(var->buf, (addr >> 8) & 0xff); /* Range base address bits[15:8] */ > + build_append_byte(var->buf, (addr >> 16) & 0xff); /* Range base address bits[23:16] */ > + build_append_byte(var->buf, (addr >> 24) & 0xff); /* Range base address bits[31:24] */ > + > + build_append_byte(var->buf, size & 0xff); /* Range length bits[7:0] */ > + build_append_byte(var->buf, (size >> 8) & 0xff); /* Range length bits[15:8] */ > + build_append_byte(var->buf, (size >> 16) & 0xff); /* Range length bits[23:16] */ > + build_append_byte(var->buf, (size >> 24) & 0xff); /* Range length bits[31:24] */ > + return var; > +} > + > /* ACPI 1.0b: 6.4.2.5 I/O Port Descriptor */ > Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base, > uint8_t aln, uint8_t len) > diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h > index 1705001..baa0652 100644 > --- a/include/hw/acpi/aml-build.h > +++ b/include/hw/acpi/aml-build.h > @@ -162,6 +162,7 @@ Aml *aml_call1(const char *method, Aml *arg1); > Aml *aml_call2(const char *method, Aml *arg1, Aml *arg2); > Aml *aml_call3(const char *method, Aml *arg1, Aml *arg2, Aml *arg3); > Aml *aml_call4(const char *method, Aml *arg1, Aml *arg2, Aml *arg3, Aml *arg4); > +Aml *aml_memory32_fixed(uint64_t addr, uint64_t size, uint8_t rw_flag); > Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base, > uint8_t aln, uint8_t len); > Aml *aml_operation_region(const char *name, AmlRegionSpace rs,