From: Daniel Vetter <daniel@ffwll.ch>
To: Peter Hurley <peter@hurleysoftware.com>
Cc: "Daniel Vetter" <daniel.vetter@ffwll.ch>,
"Intel Graphics Development" <intel-gfx@lists.freedesktop.org>,
"DRI Development" <dri-devel@lists.freedesktop.org>,
"Daniel Vetter" <daniel.vetter@intel.com>,
"Michel Dänzer" <michel@daenzer.net>
Subject: Re: [PATCH] drm/vblank: Fixup and document timestamp update/read barriers
Date: Thu, 16 Apr 2015 11:06:06 +0200 [thread overview]
Message-ID: <20150416090606.GL6092@phenom.ffwll.local> (raw)
In-Reply-To: <552F7A12.7020504@hurleysoftware.com>
On Thu, Apr 16, 2015 at 05:00:02AM -0400, Peter Hurley wrote:
> On 04/16/2015 02:39 AM, Mario Kleiner wrote:
> > I think i'm still not getting something about why the compiler would
> > be allowed to reorder in this way in absence of the additional
> > smp_rmb? Or is that barrier required for other archs which are less
> > strongly ordered?
>
> Apologies for the confusion; I missed that it was data-dependent load.
Oh right missed that too. Well, alpha can do anything, we'd need at least
a read_barrier_depends(); here. Tbh not sure that's worth it since with
the plain smp_rmb() we match the seqlock code exactly.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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next prev parent reply other threads:[~2015-04-16 9:04 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-15 7:17 [PATCH] drm/vblank: Fixup and document timestamp update/read barriers Daniel Vetter
2015-04-15 8:17 ` Chris Wilson
2015-04-15 9:25 ` Daniel Vetter
2015-04-15 9:36 ` Chris Wilson
2015-04-15 10:32 ` Daniel Vetter
2015-04-15 17:34 ` Daniel Vetter
2015-04-15 17:49 ` Chris Wilson
2015-04-15 21:26 ` Mario Kleiner
2015-04-16 1:29 ` Peter Hurley
2015-04-16 6:39 ` Mario Kleiner
2015-04-16 9:00 ` Peter Hurley
2015-04-16 9:06 ` Daniel Vetter [this message]
2015-04-16 12:52 ` Peter Hurley
2015-04-16 8:54 ` Daniel Vetter
2015-04-16 0:17 ` shuang.he
2015-04-16 8:59 ` Daniel Vetter
2015-04-17 4:27 ` shuang.he
2015-04-16 0:18 ` shuang.he
2015-04-15 13:00 ` Peter Hurley
2015-04-15 17:31 ` Daniel Vetter
2015-04-16 12:30 ` Peter Hurley
2015-04-16 13:03 ` [Intel-gfx] " Daniel Vetter
2015-05-04 4:52 ` Mario Kleiner
2015-05-05 14:36 ` Peter Hurley
2015-05-05 15:42 ` [Intel-gfx] " Daniel Vetter
2015-05-05 15:57 ` Peter Hurley
2015-05-05 19:01 ` Peter Hurley
2015-05-06 8:56 ` Daniel Vetter
2015-05-07 11:56 ` [Intel-gfx] " Peter Hurley
2015-05-07 17:33 ` Mario Kleiner
2015-04-15 19:40 ` shuang.he
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