From mboxrd@z Thu Jan 1 00:00:00 1970 From: Catalin Marinas Subject: Re: [RFC PATCH 0/5] Add smp booting support for Qualcomm ARMv8 SoCs Date: Thu, 16 Apr 2015 22:39:51 +0100 Message-ID: <20150416213950.GA3302@e104818-lin.cambridge.arm.com> References: <1428601031-5366-1-git-send-email-galak@codeaurora.org> <20150410100529.GA6854@e104818-lin.cambridge.arm.com> <20150414163613.GM28709@leverpostej> <07185B2C-3F37-4E70-9096-1EF5EA8D68CE@codeaurora.org> <20150414211720.GA56647@MBP> <20150415133403.GB26099@e104818-lin.cambridge.arm.com> <20150416152121.GE819@e104818-lin.cambridge.arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Rob Clark Cc: Mark Rutland , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "abhimany-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org" , Will Deacon , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" , Kumar Gala , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" List-Id: linux-arm-msm@vger.kernel.org On Thu, Apr 16, 2015 at 01:17:32PM -0400, Rob Clark wrote: > On Thu, Apr 16, 2015 at 11:21 AM, Catalin Marinas > wrote: > > On Wed, Apr 15, 2015 at 11:01:17AM -0400, Rob Clark wrote: > >> There are folks who are working to get saner, more-upstream kernels > >> working on devices.. and improving kernel infrastructure for > >> device-needs (well, in my neck of the woods, there is drm/kms atomic > >> and dsi/panel framework stuff.. I'm sure other similar things in other > >> kernel domains). And it seems like that is a good thing to encourage, > >> rather than stymie. > > > > I'm not looking to discourage individuals trying to get upstream support > > for older boards. Should the need arise, we'll look at options which may > > or may not include kernel changes (e.g. wrap the kernel in a shim). > > I had wondered about that, but afaiu psci is a smc interface, and I > would assume bootloader drops you out of secure mode before entering > the kernel or whatever comes after first stage bootloader if you are > chain-loading? One option is to run the shim at EL2 (hyp mode) which can intercept the SMC calls from EL1. Another option is to release all the CPUs from firmware into the shim and use a spin-table enable method. -- Catalin -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753004AbbDPVkJ (ORCPT ); Thu, 16 Apr 2015 17:40:09 -0400 Received: from foss.arm.com ([217.140.101.70]:38945 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752124AbbDPVkA (ORCPT ); Thu, 16 Apr 2015 17:40:00 -0400 Date: Thu, 16 Apr 2015 22:39:51 +0100 From: Catalin Marinas To: Rob Clark Cc: Mark Rutland , "devicetree@vger.kernel.org" , "linux-arm-msm@vger.kernel.org" , "abhimany@codeaurora.org" , Will Deacon , "linux-kernel@vger.kernel.org" , "arm@kernel.org" , Kumar Gala , "linux-arm-kernel@lists.infradead.org" Subject: Re: [RFC PATCH 0/5] Add smp booting support for Qualcomm ARMv8 SoCs Message-ID: <20150416213950.GA3302@e104818-lin.cambridge.arm.com> References: <1428601031-5366-1-git-send-email-galak@codeaurora.org> <20150410100529.GA6854@e104818-lin.cambridge.arm.com> <20150414163613.GM28709@leverpostej> <07185B2C-3F37-4E70-9096-1EF5EA8D68CE@codeaurora.org> <20150414211720.GA56647@MBP> <20150415133403.GB26099@e104818-lin.cambridge.arm.com> <20150416152121.GE819@e104818-lin.cambridge.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 16, 2015 at 01:17:32PM -0400, Rob Clark wrote: > On Thu, Apr 16, 2015 at 11:21 AM, Catalin Marinas > wrote: > > On Wed, Apr 15, 2015 at 11:01:17AM -0400, Rob Clark wrote: > >> There are folks who are working to get saner, more-upstream kernels > >> working on devices.. and improving kernel infrastructure for > >> device-needs (well, in my neck of the woods, there is drm/kms atomic > >> and dsi/panel framework stuff.. I'm sure other similar things in other > >> kernel domains). And it seems like that is a good thing to encourage, > >> rather than stymie. > > > > I'm not looking to discourage individuals trying to get upstream support > > for older boards. Should the need arise, we'll look at options which may > > or may not include kernel changes (e.g. wrap the kernel in a shim). > > I had wondered about that, but afaiu psci is a smc interface, and I > would assume bootloader drops you out of secure mode before entering > the kernel or whatever comes after first stage bootloader if you are > chain-loading? One option is to run the shim at EL2 (hyp mode) which can intercept the SMC calls from EL1. Another option is to release all the CPUs from firmware into the shim and use a spin-table enable method. -- Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 From: catalin.marinas@arm.com (Catalin Marinas) Date: Thu, 16 Apr 2015 22:39:51 +0100 Subject: [RFC PATCH 0/5] Add smp booting support for Qualcomm ARMv8 SoCs In-Reply-To: References: <1428601031-5366-1-git-send-email-galak@codeaurora.org> <20150410100529.GA6854@e104818-lin.cambridge.arm.com> <20150414163613.GM28709@leverpostej> <07185B2C-3F37-4E70-9096-1EF5EA8D68CE@codeaurora.org> <20150414211720.GA56647@MBP> <20150415133403.GB26099@e104818-lin.cambridge.arm.com> <20150416152121.GE819@e104818-lin.cambridge.arm.com> Message-ID: <20150416213950.GA3302@e104818-lin.cambridge.arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, Apr 16, 2015 at 01:17:32PM -0400, Rob Clark wrote: > On Thu, Apr 16, 2015 at 11:21 AM, Catalin Marinas > wrote: > > On Wed, Apr 15, 2015 at 11:01:17AM -0400, Rob Clark wrote: > >> There are folks who are working to get saner, more-upstream kernels > >> working on devices.. and improving kernel infrastructure for > >> device-needs (well, in my neck of the woods, there is drm/kms atomic > >> and dsi/panel framework stuff.. I'm sure other similar things in other > >> kernel domains). And it seems like that is a good thing to encourage, > >> rather than stymie. > > > > I'm not looking to discourage individuals trying to get upstream support > > for older boards. Should the need arise, we'll look at options which may > > or may not include kernel changes (e.g. wrap the kernel in a shim). > > I had wondered about that, but afaiu psci is a smc interface, and I > would assume bootloader drops you out of secure mode before entering > the kernel or whatever comes after first stage bootloader if you are > chain-loading? One option is to run the shim at EL2 (hyp mode) which can intercept the SMC calls from EL1. Another option is to release all the CPUs from firmware into the shim and use a spin-table enable method. -- Catalin