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* [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
@ 2015-04-20  5:26 ` Christophe Leroy
  0 siblings, 0 replies; 12+ messages in thread
From: Christophe Leroy @ 2015-04-20  5:26 UTC (permalink / raw)
  To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, scottwood
  Cc: linux-kernel, linuxppc-dev, Joakim Tjernlund

All accessed to PGD entries are done via 0(r11).
By using lower part of swapper_pg_dir as load index to r11, we can remove the
ori instruction.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

---
 arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index ae05f28..aa45225 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -322,13 +322,12 @@ InstructionTLBMiss:
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
 #ifdef CONFIG_MODULES
 	beq	3f
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
 #endif
 	/* Insert level 1 index */
 	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 
 	/* Load the MI_TWC with the attributes for this "segment." */
 	MTSPR_CPU6(SPRN_MI_TWC, r11, r3)	/* Set segment attributes */
@@ -376,12 +375,11 @@ DataStoreTLBMiss:
 	andis.	r11, r10, 0x8000
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
 	beq	3f
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
 	/* Insert level 1 index */
 	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 
 	/* We have a pte table, so load fetch the pte from the table.
 	 */
@@ -510,12 +508,11 @@ FixupDAR:/* Entry point for dcbx workaround. */
 	mfspr	r10, SPRN_SRR0
 	andis.	r11, r10, 0x8000	/* Address >= 0x80000000 */
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
-	beq-	3f		/* Branch if user space */
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	beq	3f
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 	/* Insert level 1 index */
 3:	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 	rlwinm	r11, r11,0,0,19	/* Extract page descriptor page address */
 	/* Insert level 2 index */
 	rlwimi	r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
@@ -670,8 +667,7 @@ start_here:
 	 * init's THREAD like the context switch code does, but this is
 	 * easier......until someone changes init's static structures.
 	 */
-	lis	r6, swapper_pg_dir@h
-	ori	r6, r6, swapper_pg_dir@l
+	lis	r6, swapper_pg_dir@ha
 	tophys(r6,r6)
 #ifdef CONFIG_8xx_CPU6
 	lis	r4, cpu6_errata_word@h
@@ -850,6 +846,8 @@ _GLOBAL(set_context)
 	stw	r4, 0x4(r5)
 #endif
 
+	li	r5, (swapper_pg_dir-PAGE_OFFSET)@l
+	sub	r4, r4, r5
 #ifdef CONFIG_8xx_CPU6
 	lis	r6, cpu6_errata_word@h
 	ori	r6, r6, cpu6_errata_word@l
-- 
2.1.0


^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
@ 2015-04-20  5:26 ` Christophe Leroy
  0 siblings, 0 replies; 12+ messages in thread
From: Christophe Leroy @ 2015-04-20  5:26 UTC (permalink / raw)
  To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, scottwood
  Cc: linuxppc-dev, linux-kernel

All accessed to PGD entries are done via 0(r11).
By using lower part of swapper_pg_dir as load index to r11, we can remove the
ori instruction.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

---
 arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index ae05f28..aa45225 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -322,13 +322,12 @@ InstructionTLBMiss:
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
 #ifdef CONFIG_MODULES
 	beq	3f
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
 #endif
 	/* Insert level 1 index */
 	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 
 	/* Load the MI_TWC with the attributes for this "segment." */
 	MTSPR_CPU6(SPRN_MI_TWC, r11, r3)	/* Set segment attributes */
@@ -376,12 +375,11 @@ DataStoreTLBMiss:
 	andis.	r11, r10, 0x8000
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
 	beq	3f
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
 	/* Insert level 1 index */
 	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 
 	/* We have a pte table, so load fetch the pte from the table.
 	 */
@@ -510,12 +508,11 @@ FixupDAR:/* Entry point for dcbx workaround. */
 	mfspr	r10, SPRN_SRR0
 	andis.	r11, r10, 0x8000	/* Address >= 0x80000000 */
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
-	beq-	3f		/* Branch if user space */
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	beq	3f
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 	/* Insert level 1 index */
 3:	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 	rlwinm	r11, r11,0,0,19	/* Extract page descriptor page address */
 	/* Insert level 2 index */
 	rlwimi	r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
@@ -670,8 +667,7 @@ start_here:
 	 * init's THREAD like the context switch code does, but this is
 	 * easier......until someone changes init's static structures.
 	 */
-	lis	r6, swapper_pg_dir@h
-	ori	r6, r6, swapper_pg_dir@l
+	lis	r6, swapper_pg_dir@ha
 	tophys(r6,r6)
 #ifdef CONFIG_8xx_CPU6
 	lis	r4, cpu6_errata_word@h
@@ -850,6 +846,8 @@ _GLOBAL(set_context)
 	stw	r4, 0x4(r5)
 #endif
 
+	li	r5, (swapper_pg_dir-PAGE_OFFSET)@l
+	sub	r4, r4, r5
 #ifdef CONFIG_8xx_CPU6
 	lis	r6, cpu6_errata_word@h
 	ori	r6, r6, cpu6_errata_word@l
-- 
2.1.0

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* RE: [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
  2015-01-06 13:27       ` leroy christophe
@ 2015-01-06 14:41         ` David Laight
  -1 siblings, 0 replies; 12+ messages in thread
From: David Laight @ 2015-01-06 14:41 UTC (permalink / raw)
  To: 'leroy christophe', 'Joakim Tjernlund'
  Cc: linux-kernel, paulus, scottwood, linuxppc-dev

From: leroy christophe
> Le 06/01/2015 13:08, David Laight a écrit :
> >> On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote:
> >>> All accessed to PGD entries are done via 0(r11).
> >>> By using lower part of swapper_pg_dir as load index to r11, we can remove the
> >>> ori instruction.
> >>>
> >>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
> >> Nice :)
> >> Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
> >>
> >>> ---
> >>>   arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
> >>>   1 file changed, 10 insertions(+), 12 deletions(-)
> >>>
> >>> diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
> >>> index ae05f28..aa45225 100644
> >>> --- a/arch/powerpc/kernel/head_8xx.S
> >>> +++ b/arch/powerpc/kernel/head_8xx.S
> >>> @@ -322,13 +322,12 @@ InstructionTLBMiss:
> >>>          mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
> >>>   #ifdef CONFIG_MODULES
> >>>          beq     3f
> >>> -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
> >>> -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
> >>> +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
> >>>   3:
> >>>   #endif
> >>>          /* Insert level 1 index */
> >>>          rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
> >>> -       lwz     r11, 0(r11)/* Get the level 1 entry */
> >>> +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */
> >>>
> > On the face of it that fragment doesn't look right when CONFIG_MODULES is undefined.
> >
> > 	David
> >
> I'm not sure I understand what you mean.
> 
> The other part of the patch adds the following:
> +    li    r5, (swapper_pg_dir-PAGE_OFFSET)@l
> +    sub    r4, r4, r5
> 
> r4 is the value put into SPRN_M_TW, so I don't see what may be wrong.

Ok, but it is completely non-obvious.
You probably need to change some comments somewhere about what is held
in SPRN_M_TW - since it is no longer the L1 base address, but that value
offset by some 'random' amount.

	David


^ permalink raw reply	[flat|nested] 12+ messages in thread
* RE: [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
@ 2015-01-06 14:41         ` David Laight
  0 siblings, 0 replies; 12+ messages in thread
From: David Laight @ 2015-01-06 14:41 UTC (permalink / raw)
  To: 'leroy christophe', 'Joakim Tjernlund'
  Cc: scottwood, linuxppc-dev, paulus, linux-kernel

From: leroy christophe
> Le 06/01/2015 13:08, David Laight a =E9crit :
> >> On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote:
> >>> All accessed to PGD entries are done via 0(r11).
> >>> By using lower part of swapper_pg_dir as load index to r11, we can re=
move the
> >>> ori instruction.
> >>>
> >>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
> >> Nice :)
> >> Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
> >>
> >>> ---
> >>>   arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
> >>>   1 file changed, 10 insertions(+), 12 deletions(-)
> >>>
> >>> diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/hea=
d_8xx.S
> >>> index ae05f28..aa45225 100644
> >>> --- a/arch/powerpc/kernel/head_8xx.S
> >>> +++ b/arch/powerpc/kernel/head_8xx.S
> >>> @@ -322,13 +322,12 @@ InstructionTLBMiss:
> >>>          mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
> >>>   #ifdef CONFIG_MODULES
> >>>          beq     3f
> >>> -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
> >>> -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
> >>> +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
> >>>   3:
> >>>   #endif
> >>>          /* Insert level 1 index */
> >>>          rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT =
- 2) << 1, 29
> >>> -       lwz     r11, 0(r11)/* Get the level 1 entry */
> >>> +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the le=
vel 1 entry */
> >>>
> > On the face of it that fragment doesn't look right when CONFIG_MODULES =
is undefined.
> >
> > 	David
> >
> I'm not sure I understand what you mean.
>=20
> The other part of the patch adds the following:
> +    li    r5, (swapper_pg_dir-PAGE_OFFSET)@l
> +    sub    r4, r4, r5
>=20
> r4 is the value put into SPRN_M_TW, so I don't see what may be wrong.

Ok, but it is completely non-obvious.
You probably need to change some comments somewhere about what is held
in SPRN_M_TW - since it is no longer the L1 base address, but that value
offset by some 'random' amount.

	David

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
  2015-01-06 12:08     ` David Laight
@ 2015-01-06 13:27       ` leroy christophe
  -1 siblings, 0 replies; 12+ messages in thread
From: leroy christophe @ 2015-01-06 13:27 UTC (permalink / raw)
  To: David Laight, 'Joakim Tjernlund'
  Cc: linux-kernel, paulus, scottwood, linuxppc-dev


Le 06/01/2015 13:08, David Laight a écrit :
>> On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote:
>>> All accessed to PGD entries are done via 0(r11).
>>> By using lower part of swapper_pg_dir as load index to r11, we can remove the
>>> ori instruction.
>>>
>>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>> Nice :)
>> Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
>>
>>> ---
>>>   arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
>>>   1 file changed, 10 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
>>> index ae05f28..aa45225 100644
>>> --- a/arch/powerpc/kernel/head_8xx.S
>>> +++ b/arch/powerpc/kernel/head_8xx.S
>>> @@ -322,13 +322,12 @@ InstructionTLBMiss:
>>>          mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
>>>   #ifdef CONFIG_MODULES
>>>          beq     3f
>>> -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
>>> -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
>>> +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
>>>   3:
>>>   #endif
>>>          /* Insert level 1 index */
>>>          rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
>>> -       lwz     r11, 0(r11)/* Get the level 1 entry */
>>> +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */
>>>
> On the face of it that fragment doesn't look right when CONFIG_MODULES is undefined.
>
> 	David
>
I'm not sure I understand what you mean.

The other part of the patch adds the following:
+    li    r5, (swapper_pg_dir-PAGE_OFFSET)@l
+    sub    r4, r4, r5

r4 is the value put into SPRN_M_TW, so I don't see what may be wrong.

Christophe

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
@ 2015-01-06 13:27       ` leroy christophe
  0 siblings, 0 replies; 12+ messages in thread
From: leroy christophe @ 2015-01-06 13:27 UTC (permalink / raw)
  To: David Laight, 'Joakim Tjernlund'
  Cc: scottwood, linuxppc-dev, paulus, linux-kernel


Le 06/01/2015 13:08, David Laight a écrit :
>> On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote:
>>> All accessed to PGD entries are done via 0(r11).
>>> By using lower part of swapper_pg_dir as load index to r11, we can remove the
>>> ori instruction.
>>>
>>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>> Nice :)
>> Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
>>
>>> ---
>>>   arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
>>>   1 file changed, 10 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
>>> index ae05f28..aa45225 100644
>>> --- a/arch/powerpc/kernel/head_8xx.S
>>> +++ b/arch/powerpc/kernel/head_8xx.S
>>> @@ -322,13 +322,12 @@ InstructionTLBMiss:
>>>          mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
>>>   #ifdef CONFIG_MODULES
>>>          beq     3f
>>> -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
>>> -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
>>> +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
>>>   3:
>>>   #endif
>>>          /* Insert level 1 index */
>>>          rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
>>> -       lwz     r11, 0(r11)/* Get the level 1 entry */
>>> +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */
>>>
> On the face of it that fragment doesn't look right when CONFIG_MODULES is undefined.
>
> 	David
>
I'm not sure I understand what you mean.

The other part of the patch adds the following:
+    li    r5, (swapper_pg_dir-PAGE_OFFSET)@l
+    sub    r4, r4, r5

r4 is the value put into SPRN_M_TW, so I don't see what may be wrong.

Christophe

^ permalink raw reply	[flat|nested] 12+ messages in thread
* RE: [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
  2015-01-05 18:33   ` Joakim Tjernlund
@ 2015-01-06 12:08     ` David Laight
  -1 siblings, 0 replies; 12+ messages in thread
From: David Laight @ 2015-01-06 12:08 UTC (permalink / raw)
  To: 'Joakim Tjernlund', christophe.leroy
  Cc: linux-kernel, paulus, scottwood, linuxppc-dev

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 1584 bytes --]

> On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote:
> > All accessed to PGD entries are done via 0(r11).
> > By using lower part of swapper_pg_dir as load index to r11, we can remove the
> > ori instruction.
> >
> > Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
> 
> Nice :)
> Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
> 
> >
> > ---
> >  arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
> >  1 file changed, 10 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
> > index ae05f28..aa45225 100644
> > --- a/arch/powerpc/kernel/head_8xx.S
> > +++ b/arch/powerpc/kernel/head_8xx.S
> > @@ -322,13 +322,12 @@ InstructionTLBMiss:
> >         mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
> >  #ifdef CONFIG_MODULES
> >         beq     3f
> > -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
> > -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
> > +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
> >  3:
> >  #endif
> >         /* Insert level 1 index */
> >         rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
> > -       lwz     r11, 0(r11)/* Get the level 1 entry */
> > +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */
> >

On the face of it that fragment doesn't look right when CONFIG_MODULES is undefined.

	David

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^ permalink raw reply	[flat|nested] 12+ messages in thread
* RE: [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
@ 2015-01-06 12:08     ` David Laight
  0 siblings, 0 replies; 12+ messages in thread
From: David Laight @ 2015-01-06 12:08 UTC (permalink / raw)
  To: 'Joakim Tjernlund', christophe.leroy
  Cc: scottwood, linuxppc-dev, paulus, linux-kernel

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R19NT0RVTEVTIGlzIHVuZGVmaW5lZC4NCg0KCURhdmlkDQoNCg==

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
  2014-12-16 15:03 ` Christophe Leroy
@ 2015-01-05 18:33   ` Joakim Tjernlund
  -1 siblings, 0 replies; 12+ messages in thread
From: Joakim Tjernlund @ 2015-01-05 18:33 UTC (permalink / raw)
  To: christophe.leroy; +Cc: scottwood, paulus, mpe, benh, linux-kernel, linuxppc-dev


On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote:
> All accessed to PGD entries are done via 0(r11).
> By using lower part of swapper_pg_dir as load index to r11, we can remove the
> ori instruction.
> 
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

Nice :)
Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>

> 
> ---
>  arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
>  1 file changed, 10 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
> index ae05f28..aa45225 100644
> --- a/arch/powerpc/kernel/head_8xx.S
> +++ b/arch/powerpc/kernel/head_8xx.S
> @@ -322,13 +322,12 @@ InstructionTLBMiss:
>         mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
>  #ifdef CONFIG_MODULES
>         beq     3f
> -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
> -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
> +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
>  3:
>  #endif
>         /* Insert level 1 index */
>         rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
> -       lwz     r11, 0(r11)/* Get the level 1 entry */
> +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */
>  
>         /* Load the MI_TWC with the attributes for this "segment." */
>         MTSPR_CPU6(SPRN_MI_TWC, r11, r3)/* Set segment attributes */
> @@ -376,12 +375,11 @@ DataStoreTLBMiss:
>         andis.  r11, r10, 0x8000
>         mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
>         beq     3f
> -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
> -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
> +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
>  3:
>         /* Insert level 1 index */
>         rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
> -       lwz     r11, 0(r11)/* Get the level 1 entry */
> +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */
>  
>         /* We have a pte table, so load fetch the pte from the table.
>                 */
> @@ -510,12 +508,11 @@ FixupDAR:/* Entry point for dcbx workaround. */
>         mfspr   r10, SPRN_SRR0
>         andis.  r11, r10, 0x8000/* Address >= 0x80000000 */
>         mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
> -       beq-    3f      /* Branch if user space */
> -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
> -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
> +       beq     3f
> +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
>         /* Insert level 1 index */
>  3:     rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
> -       lwz     r11, 0(r11)/* Get the level 1 entry */
> +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */
>         rlwinm  r11, r11,0,0,19/* Extract page descriptor page address */
>         /* Insert level 2 index */
>         rlwimi  r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
> @@ -670,8 +667,7 @@ start_here:
>                 * init's THREAD like the context switch code does, but this is
>                 * easier......until someone changes init's static structures.
>                 */
> -       lis     r6, swapper_pg_dir@h
> -       ori     r6, r6, swapper_pg_dir@l
> +       lis     r6, swapper_pg_dir@ha
>         tophys(r6,r6)
>  #ifdef CONFIG_8xx_CPU6
>         lis     r4, cpu6_errata_word@h
> @@ -850,6 +846,8 @@ _GLOBAL(set_context)
>         stw     r4, 0x4(r5)
>  #endif
>  
> +       li      r5, (swapper_pg_dir-PAGE_OFFSET)@l
> +       sub     r4, r4, r5
>  #ifdef CONFIG_8xx_CPU6
>         lis     r6, cpu6_errata_word@h
>         ori     r6, r6, cpu6_errata_word@l

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
@ 2015-01-05 18:33   ` Joakim Tjernlund
  0 siblings, 0 replies; 12+ messages in thread
From: Joakim Tjernlund @ 2015-01-05 18:33 UTC (permalink / raw)
  To: christophe.leroy; +Cc: linux-kernel, paulus, scottwood, linuxppc-dev


On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote:
> All accessed to PGD entries are done via 0(r11).
> By using lower part of swapper_pg_dir as load index to r11, we can remove=
 the
> ori instruction.
>=20
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

Nice :)
Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>

>=20
> ---
>  arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
>  1 file changed, 10 insertions(+), 12 deletions(-)
>=20
> diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8x=
x.S
> index ae05f28..aa45225 100644
> --- a/arch/powerpc/kernel/head_8xx.S
> +++ b/arch/powerpc/kernel/head_8xx.S
> @@ -322,13 +322,12 @@ InstructionTLBMiss:
>         mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
>  #ifdef CONFIG_MODULES
>         beq     3f
> -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
> -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
> +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
>  3:
>  #endif
>         /* Insert level 1 index */
>         rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) =
<< 1, 29
> -       lwz     r11, 0(r11)/* Get the level 1 entry */
> +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level =
1 entry */
> =20
>         /* Load the MI_TWC with the attributes for this "segment." */
>         MTSPR_CPU6(SPRN_MI_TWC, r11, r3)/* Set segment attributes */
> @@ -376,12 +375,11 @@ DataStoreTLBMiss:
>         andis.  r11, r10, 0x8000
>         mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
>         beq     3f
> -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
> -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
> +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
>  3:
>         /* Insert level 1 index */
>         rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) =
<< 1, 29
> -       lwz     r11, 0(r11)/* Get the level 1 entry */
> +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level =
1 entry */
> =20
>         /* We have a pte table, so load fetch the pte from the table.
>                 */
> @@ -510,12 +508,11 @@ FixupDAR:/* Entry point for dcbx workaround. */
>         mfspr   r10, SPRN_SRR0
>         andis.  r11, r10, 0x8000/* Address >=3D 0x80000000 */
>         mfspr   r11, SPRN_M_TW/* Get level 1 table base address */
> -       beq-    3f      /* Branch if user space */
> -       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@h
> -       ori     r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
> +       beq     3f
> +       lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
>         /* Insert level 1 index */
>  3:     rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) =
<< 1, 29
> -       lwz     r11, 0(r11)/* Get the level 1 entry */
> +       lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level =
1 entry */
>         rlwinm  r11, r11,0,0,19/* Extract page descriptor page address */
>         /* Insert level 2 index */
>         rlwimi  r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
> @@ -670,8 +667,7 @@ start_here:
>                 * init's THREAD like the context switch code does, but th=
is is
>                 * easier......until someone changes init's static structu=
res.
>                 */
> -       lis     r6, swapper_pg_dir@h
> -       ori     r6, r6, swapper_pg_dir@l
> +       lis     r6, swapper_pg_dir@ha
>         tophys(r6,r6)
>  #ifdef CONFIG_8xx_CPU6
>         lis     r4, cpu6_errata_word@h
> @@ -850,6 +846,8 @@ _GLOBAL(set_context)
>         stw     r4, 0x4(r5)
>  #endif
> =20
> +       li      r5, (swapper_pg_dir-PAGE_OFFSET)@l
> +       sub     r4, r4, r5
>  #ifdef CONFIG_8xx_CPU6
>         lis     r6, cpu6_errata_word@h
>         ori     r6, r6, cpu6_errata_word@l=

^ permalink raw reply	[flat|nested] 12+ messages in thread
* [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
@ 2014-12-16 15:03 ` Christophe Leroy
  0 siblings, 0 replies; 12+ messages in thread
From: Christophe Leroy @ 2014-12-16 15:03 UTC (permalink / raw)
  To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, scottwood
  Cc: linux-kernel, linuxppc-dev, Joakim Tjernlund

All accessed to PGD entries are done via 0(r11).
By using lower part of swapper_pg_dir as load index to r11, we can remove the
ori instruction.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

---
 arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index ae05f28..aa45225 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -322,13 +322,12 @@ InstructionTLBMiss:
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
 #ifdef CONFIG_MODULES
 	beq	3f
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
 #endif
 	/* Insert level 1 index */
 	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 
 	/* Load the MI_TWC with the attributes for this "segment." */
 	MTSPR_CPU6(SPRN_MI_TWC, r11, r3)	/* Set segment attributes */
@@ -376,12 +375,11 @@ DataStoreTLBMiss:
 	andis.	r11, r10, 0x8000
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
 	beq	3f
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
 	/* Insert level 1 index */
 	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 
 	/* We have a pte table, so load fetch the pte from the table.
 	 */
@@ -510,12 +508,11 @@ FixupDAR:/* Entry point for dcbx workaround. */
 	mfspr	r10, SPRN_SRR0
 	andis.	r11, r10, 0x8000	/* Address >= 0x80000000 */
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
-	beq-	3f		/* Branch if user space */
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	beq	3f
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 	/* Insert level 1 index */
 3:	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 	rlwinm	r11, r11,0,0,19	/* Extract page descriptor page address */
 	/* Insert level 2 index */
 	rlwimi	r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
@@ -670,8 +667,7 @@ start_here:
 	 * init's THREAD like the context switch code does, but this is
 	 * easier......until someone changes init's static structures.
 	 */
-	lis	r6, swapper_pg_dir@h
-	ori	r6, r6, swapper_pg_dir@l
+	lis	r6, swapper_pg_dir@ha
 	tophys(r6,r6)
 #ifdef CONFIG_8xx_CPU6
 	lis	r4, cpu6_errata_word@h
@@ -850,6 +846,8 @@ _GLOBAL(set_context)
 	stw	r4, 0x4(r5)
 #endif
 
+	li	r5, (swapper_pg_dir-PAGE_OFFSET)@l
+	sub	r4, r4, r5
 #ifdef CONFIG_8xx_CPU6
 	lis	r6, cpu6_errata_word@h
 	ori	r6, r6, cpu6_errata_word@l
-- 
2.1.0


^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
@ 2014-12-16 15:03 ` Christophe Leroy
  0 siblings, 0 replies; 12+ messages in thread
From: Christophe Leroy @ 2014-12-16 15:03 UTC (permalink / raw)
  To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, scottwood
  Cc: linuxppc-dev, linux-kernel

All accessed to PGD entries are done via 0(r11).
By using lower part of swapper_pg_dir as load index to r11, we can remove the
ori instruction.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

---
 arch/powerpc/kernel/head_8xx.S | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index ae05f28..aa45225 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -322,13 +322,12 @@ InstructionTLBMiss:
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
 #ifdef CONFIG_MODULES
 	beq	3f
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
 #endif
 	/* Insert level 1 index */
 	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 
 	/* Load the MI_TWC with the attributes for this "segment." */
 	MTSPR_CPU6(SPRN_MI_TWC, r11, r3)	/* Set segment attributes */
@@ -376,12 +375,11 @@ DataStoreTLBMiss:
 	andis.	r11, r10, 0x8000
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
 	beq	3f
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
 	/* Insert level 1 index */
 	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 
 	/* We have a pte table, so load fetch the pte from the table.
 	 */
@@ -510,12 +508,11 @@ FixupDAR:/* Entry point for dcbx workaround. */
 	mfspr	r10, SPRN_SRR0
 	andis.	r11, r10, 0x8000	/* Address >= 0x80000000 */
 	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
-	beq-	3f		/* Branch if user space */
-	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@h
-	ori	r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
+	beq	3f
+	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 	/* Insert level 1 index */
 3:	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-	lwz	r11, 0(r11)	/* Get the level 1 entry */
+	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
 	rlwinm	r11, r11,0,0,19	/* Extract page descriptor page address */
 	/* Insert level 2 index */
 	rlwimi	r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
@@ -670,8 +667,7 @@ start_here:
 	 * init's THREAD like the context switch code does, but this is
 	 * easier......until someone changes init's static structures.
 	 */
-	lis	r6, swapper_pg_dir@h
-	ori	r6, r6, swapper_pg_dir@l
+	lis	r6, swapper_pg_dir@ha
 	tophys(r6,r6)
 #ifdef CONFIG_8xx_CPU6
 	lis	r4, cpu6_errata_word@h
@@ -850,6 +846,8 @@ _GLOBAL(set_context)
 	stw	r4, 0x4(r5)
 #endif
 
+	li	r5, (swapper_pg_dir-PAGE_OFFSET)@l
+	sub	r4, r4, r5
 #ifdef CONFIG_8xx_CPU6
 	lis	r6, cpu6_errata_word@h
 	ori	r6, r6, cpu6_errata_word@l
-- 
2.1.0

^ permalink raw reply related	[flat|nested] 12+ messages in thread
end of thread, other threads:[~2015-04-20  5:30 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-04-20  5:26 [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir Christophe Leroy
2015-04-20  5:26 ` Christophe Leroy
  -- strict thread matches above, loose matches on Subject: below --
2014-12-16 15:03 Christophe Leroy
2014-12-16 15:03 ` Christophe Leroy
2015-01-05 18:33 ` Joakim Tjernlund
2015-01-05 18:33   ` Joakim Tjernlund
2015-01-06 12:08   ` David Laight
2015-01-06 12:08     ` David Laight
2015-01-06 13:27     ` leroy christophe
2015-01-06 13:27       ` leroy christophe
2015-01-06 14:41       ` David Laight
2015-01-06 14:41         ` David Laight

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