From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47781) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YkAUa-0002qI-S8 for qemu-devel@nongnu.org; Mon, 20 Apr 2015 08:08:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YkAUX-0002b1-IA for qemu-devel@nongnu.org; Mon, 20 Apr 2015 08:08:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53146) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YkAUX-0002ap-99 for qemu-devel@nongnu.org; Mon, 20 Apr 2015 08:07:57 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id t3KC7uUK015925 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Mon, 20 Apr 2015 08:07:56 -0400 Date: Mon, 20 Apr 2015 14:07:53 +0200 From: "Michael S. Tsirkin" Message-ID: <20150420140644-mutt-send-email-mst@redhat.com> References: <1429521560-2743-1-git-send-email-kraxel@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1429521560-2743-1-git-send-email-kraxel@redhat.com> Subject: Re: [Qemu-devel] [PATCH 1/6] [fixup] add ESMRAMC default List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann Cc: pbonzini@redhat.com, lersek@redhat.com, qemu-devel@nongnu.org On Mon, Apr 20, 2015 at 11:19:15AM +0200, Gerd Hoffmann wrote: > --- signature is missing. And it might be a good idea to add a cover letter, stick q35: in subject for patches, and add a bit of description in the commit log. Besides that Reviewed-by: Michael S. Tsirkin > hw/pci-host/q35.c | 1 + > include/hw/pci-host/q35.h | 7 ++++++- > 2 files changed, 7 insertions(+), 1 deletion(-) > > diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c > index 79bab15..9735db2 100644 > --- a/hw/pci-host/q35.c > +++ b/hw/pci-host/q35.c > @@ -351,6 +351,7 @@ static void mch_reset(DeviceState *qdev) > MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT); > > d->config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT; > + d->config[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_DEFAULT; > > mch_update(mch); > } > diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h > index e5d5a22..9704ccd 100644 > --- a/include/hw/pci-host/q35.h > +++ b/include/hw/pci-host/q35.h > @@ -129,7 +129,6 @@ typedef struct Q35PCIHost { > > #define MCH_HOST_BRIDGE_SMRAM 0x9d > #define MCH_HOST_BRIDGE_SMRAM_SIZE 2 > -#define MCH_HOST_BRIDGE_SMRAM_DEFAULT ((uint8_t)0x2) > #define MCH_HOST_BRIDGE_SMRAM_D_OPEN ((uint8_t)(1 << 6)) > #define MCH_HOST_BRIDGE_SMRAM_D_CLS ((uint8_t)(1 << 5)) > #define MCH_HOST_BRIDGE_SMRAM_D_LCK ((uint8_t)(1 << 4)) > @@ -140,6 +139,8 @@ typedef struct Q35PCIHost { > #define MCH_HOST_BRIDGE_SMRAM_C_END 0xc0000 > #define MCH_HOST_BRIDGE_SMRAM_C_SIZE 0x20000 > #define MCH_HOST_BRIDGE_UPPER_SYSTEM_BIOS_END 0x100000 > +#define MCH_HOST_BRIDGE_SMRAM_DEFAULT \ > + MCH_HOST_BRIDGE_SMRAM_C_BASE_SEG > > #define MCH_HOST_BRIDGE_ESMRAMC 0x9e > #define MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME ((uint8_t)(1 << 7)) > @@ -152,6 +153,10 @@ typedef struct Q35PCIHost { > #define MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_2MB ((uint8_t)(0x1 << 1)) > #define MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_8MB ((uint8_t)(0x2 << 1)) > #define MCH_HOST_BRIDGE_ESMRAMC_T_EN ((uint8_t)1) > +#define MCH_HOST_BRIDGE_ESMRAMC_DEFAULT \ > + (MCH_HOST_BRIDGE_ESMRAMC_SM_CACHE | \ > + MCH_HOST_BRIDGE_ESMRAMC_SM_L1 | \ > + MCH_HOST_BRIDGE_ESMRAMC_SM_L2) > > /* D1:F0 PCIE* port*/ > #define MCH_PCIE_DEV 1 > -- > 1.8.3.1