From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753126AbbEABUp (ORCPT ); Thu, 30 Apr 2015 21:20:45 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:53550 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752866AbbEABUm (ORCPT ); Thu, 30 Apr 2015 21:20:42 -0400 Date: Thu, 30 Apr 2015 18:20:39 -0700 From: Stephen Boyd To: Sascha Hauer Cc: Mike Turquette , YH Chen , linux-kernel@vger.kernel.org, Henry Chen , linux-mediatek@lists.infradead.org, kernel@pengutronix.de, Matthias Brugger , Yingjoe Chen , Eddie Huang , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: Re: [PATCH 6/6] dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers Message-ID: <20150501012039.GG32407@codeaurora.org> References: <1429778143-2074-1-git-send-email-s.hauer@pengutronix.de> <1429778143-2074-7-git-send-email-s.hauer@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1429778143-2074-7-git-send-email-s.hauer@pengutronix.de> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/23, Sascha Hauer wrote: > This adds the binding documentation for the apmixedsys, perisys and > infracfg controllers found on Mediatek SoCs. > > Signed-off-by: Sascha Hauer Please Cc devicetree reviewers on bindings (CCed now). > --- > .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 23 +++++++++++++++++ > .../bindings/arm/mediatek/mediatek,infracfg.txt | 30 ++++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,pericfg.txt | 30 ++++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,topckgen.txt | 23 +++++++++++++++++ > 4 files changed, 106 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > new file mode 100644 > index 0000000..5af6d73 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > @@ -0,0 +1,23 @@ > +Mediatek apmixedsys controller > +============================== > + > +The Mediatek apmixedsys controller provides the PLLs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-apmixedsys" > + - "mediatek,mt8173-apmixedsys" > +- #clock-cells: Must be 1 > + > +The apmixedsys controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > + > +Example: > + > +apmixedsys: apmixedsys@10209000 { apmixedsys: clock-controller@10209000 { would be more standard. The same comment applies throughout this patch. Otherwise it looks good to me. -Stephen > + compatible = "mediatek,mt8173-apmixedsys"; > + reg = <0 0x10209000 0 0x1000>; > + #clock-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > new file mode 100644 > index 0000000..684da473 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > @@ -0,0 +1,30 @@ > +Mediatek infracfg controller > +============================ > + > +The Mediatek infracfg controller provides various clocks and reset > +outputs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-infracfg", "syscon" > + - "mediatek,mt8173-infracfg", "syscon" > +- #clock-cells: Must be 1 > +- #reset-cells: Must be 1 > + > +The infracfg controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > +Also it uses the common reset controller binding from > +Documentation/devicetree/bindings/reset/reset.txt. > +The available reset outputs are defined in > +dt-bindings/reset-controller/mt*-resets.h > + > +Example: > + > +infracfg: infracfg@10001000 { > + compatible = "mediatek,mt8173-infracfg", "syscon"; > + reg = <0 0x10001000 0 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > new file mode 100644 > index 0000000..fdb45c6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > @@ -0,0 +1,30 @@ > +Mediatek pericfg controller > +=========================== > + > +The Mediatek pericfg controller provides various clocks and reset > +outputs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-pericfg", "syscon" > + - "mediatek,mt8173-pericfg", "syscon" > +- #clock-cells: Must be 1 > +- #reset-cells: Must be 1 > + > +The pericfg controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > +Also it uses the common reset controller binding from > +Documentation/devicetree/bindings/reset/reset.txt. > +The available reset outputs are defined in > +dt-bindings/reset-controller/mt*-resets.h > + > +Example: > + > +pericfg: pericfg@10003000 { > + compatible = "mediatek,mt8173-pericfg", "syscon"; > + reg = <0 0x10003000 0 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > new file mode 100644 > index 0000000..a425248 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > @@ -0,0 +1,23 @@ > +Mediatek topckgen controller > +============================ > + > +The Mediatek topckgen controller provides various clocks to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-topckgen" > + - "mediatek,mt8173-topckgen" > +- #clock-cells: Must be 1 > + > +The topckgen controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > + > +Example: > + > +topckgen: topckgen@10000000 { > + compatible = "mediatek,mt8173-topckgen"; > + reg = <0 0x10000000 0 0x1000>; > + #clock-cells = <1>; > +}; > -- > 2.1.4 > -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH 6/6] dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers Date: Thu, 30 Apr 2015 18:20:39 -0700 Message-ID: <20150501012039.GG32407@codeaurora.org> References: <1429778143-2074-1-git-send-email-s.hauer@pengutronix.de> <1429778143-2074-7-git-send-email-s.hauer@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1429778143-2074-7-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Sascha Hauer Cc: Mike Turquette , YH Chen , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Henry Chen , linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org, Matthias Brugger , Yingjoe Chen , Eddie Huang , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On 04/23, Sascha Hauer wrote: > This adds the binding documentation for the apmixedsys, perisys and > infracfg controllers found on Mediatek SoCs. > > Signed-off-by: Sascha Hauer Please Cc devicetree reviewers on bindings (CCed now). > --- > .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 23 +++++++++++++++++ > .../bindings/arm/mediatek/mediatek,infracfg.txt | 30 ++++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,pericfg.txt | 30 ++++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,topckgen.txt | 23 +++++++++++++++++ > 4 files changed, 106 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > new file mode 100644 > index 0000000..5af6d73 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > @@ -0,0 +1,23 @@ > +Mediatek apmixedsys controller > +============================== > + > +The Mediatek apmixedsys controller provides the PLLs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-apmixedsys" > + - "mediatek,mt8173-apmixedsys" > +- #clock-cells: Must be 1 > + > +The apmixedsys controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > + > +Example: > + > +apmixedsys: apmixedsys@10209000 { apmixedsys: clock-controller@10209000 { would be more standard. The same comment applies throughout this patch. Otherwise it looks good to me. -Stephen > + compatible = "mediatek,mt8173-apmixedsys"; > + reg = <0 0x10209000 0 0x1000>; > + #clock-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > new file mode 100644 > index 0000000..684da473 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > @@ -0,0 +1,30 @@ > +Mediatek infracfg controller > +============================ > + > +The Mediatek infracfg controller provides various clocks and reset > +outputs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-infracfg", "syscon" > + - "mediatek,mt8173-infracfg", "syscon" > +- #clock-cells: Must be 1 > +- #reset-cells: Must be 1 > + > +The infracfg controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > +Also it uses the common reset controller binding from > +Documentation/devicetree/bindings/reset/reset.txt. > +The available reset outputs are defined in > +dt-bindings/reset-controller/mt*-resets.h > + > +Example: > + > +infracfg: infracfg@10001000 { > + compatible = "mediatek,mt8173-infracfg", "syscon"; > + reg = <0 0x10001000 0 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > new file mode 100644 > index 0000000..fdb45c6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > @@ -0,0 +1,30 @@ > +Mediatek pericfg controller > +=========================== > + > +The Mediatek pericfg controller provides various clocks and reset > +outputs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-pericfg", "syscon" > + - "mediatek,mt8173-pericfg", "syscon" > +- #clock-cells: Must be 1 > +- #reset-cells: Must be 1 > + > +The pericfg controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > +Also it uses the common reset controller binding from > +Documentation/devicetree/bindings/reset/reset.txt. > +The available reset outputs are defined in > +dt-bindings/reset-controller/mt*-resets.h > + > +Example: > + > +pericfg: pericfg@10003000 { > + compatible = "mediatek,mt8173-pericfg", "syscon"; > + reg = <0 0x10003000 0 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > new file mode 100644 > index 0000000..a425248 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > @@ -0,0 +1,23 @@ > +Mediatek topckgen controller > +============================ > + > +The Mediatek topckgen controller provides various clocks to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-topckgen" > + - "mediatek,mt8173-topckgen" > +- #clock-cells: Must be 1 > + > +The topckgen controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > + > +Example: > + > +topckgen: topckgen@10000000 { > + compatible = "mediatek,mt8173-topckgen"; > + reg = <0 0x10000000 0 0x1000>; > + #clock-cells = <1>; > +}; > -- > 2.1.4 > -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: sboyd@codeaurora.org (Stephen Boyd) Date: Thu, 30 Apr 2015 18:20:39 -0700 Subject: [PATCH 6/6] dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers In-Reply-To: <1429778143-2074-7-git-send-email-s.hauer@pengutronix.de> References: <1429778143-2074-1-git-send-email-s.hauer@pengutronix.de> <1429778143-2074-7-git-send-email-s.hauer@pengutronix.de> Message-ID: <20150501012039.GG32407@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 04/23, Sascha Hauer wrote: > This adds the binding documentation for the apmixedsys, perisys and > infracfg controllers found on Mediatek SoCs. > > Signed-off-by: Sascha Hauer Please Cc devicetree reviewers on bindings (CCed now). > --- > .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 23 +++++++++++++++++ > .../bindings/arm/mediatek/mediatek,infracfg.txt | 30 ++++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,pericfg.txt | 30 ++++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,topckgen.txt | 23 +++++++++++++++++ > 4 files changed, 106 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > new file mode 100644 > index 0000000..5af6d73 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > @@ -0,0 +1,23 @@ > +Mediatek apmixedsys controller > +============================== > + > +The Mediatek apmixedsys controller provides the PLLs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-apmixedsys" > + - "mediatek,mt8173-apmixedsys" > +- #clock-cells: Must be 1 > + > +The apmixedsys controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > + > +Example: > + > +apmixedsys: apmixedsys at 10209000 { apmixedsys: clock-controller at 10209000 { would be more standard. The same comment applies throughout this patch. Otherwise it looks good to me. -Stephen > + compatible = "mediatek,mt8173-apmixedsys"; > + reg = <0 0x10209000 0 0x1000>; > + #clock-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > new file mode 100644 > index 0000000..684da473 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > @@ -0,0 +1,30 @@ > +Mediatek infracfg controller > +============================ > + > +The Mediatek infracfg controller provides various clocks and reset > +outputs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-infracfg", "syscon" > + - "mediatek,mt8173-infracfg", "syscon" > +- #clock-cells: Must be 1 > +- #reset-cells: Must be 1 > + > +The infracfg controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > +Also it uses the common reset controller binding from > +Documentation/devicetree/bindings/reset/reset.txt. > +The available reset outputs are defined in > +dt-bindings/reset-controller/mt*-resets.h > + > +Example: > + > +infracfg: infracfg at 10001000 { > + compatible = "mediatek,mt8173-infracfg", "syscon"; > + reg = <0 0x10001000 0 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > new file mode 100644 > index 0000000..fdb45c6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > @@ -0,0 +1,30 @@ > +Mediatek pericfg controller > +=========================== > + > +The Mediatek pericfg controller provides various clocks and reset > +outputs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-pericfg", "syscon" > + - "mediatek,mt8173-pericfg", "syscon" > +- #clock-cells: Must be 1 > +- #reset-cells: Must be 1 > + > +The pericfg controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > +Also it uses the common reset controller binding from > +Documentation/devicetree/bindings/reset/reset.txt. > +The available reset outputs are defined in > +dt-bindings/reset-controller/mt*-resets.h > + > +Example: > + > +pericfg: pericfg at 10003000 { > + compatible = "mediatek,mt8173-pericfg", "syscon"; > + reg = <0 0x10003000 0 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > new file mode 100644 > index 0000000..a425248 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > @@ -0,0 +1,23 @@ > +Mediatek topckgen controller > +============================ > + > +The Mediatek topckgen controller provides various clocks to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-topckgen" > + - "mediatek,mt8173-topckgen" > +- #clock-cells: Must be 1 > + > +The topckgen controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > + > +Example: > + > +topckgen: topckgen at 10000000 { > + compatible = "mediatek,mt8173-topckgen"; > + reg = <0 0x10000000 0 0x1000>; > + #clock-cells = <1>; > +}; > -- > 2.1.4 > -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project