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diff for duplicates of <20150504122303.GD4096@pd.tnic>

diff --git a/a/1.txt b/N1/1.txt
index ef34ac3..0329312 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -53,8 +53,7 @@ On Wed, Apr 29, 2015 at 02:44:07PM -0700, Luis R. Rodriguez wrote:
 > +Richard Gooch <rgooch@atnf.csiro.au> - 3 Jun 1999
 > +Luis R. Rodriguez <mcgrof@do-not-panic.com> - April 9, 2015
 > +
-> +===============================================================================
-> +Phasing MTRR use
+> +=======================================> +Phasing MTRR use
 
 "Phasing out...".
 
@@ -66,8 +65,7 @@ On Wed, Apr 29, 2015 at 02:44:07PM -0700, Luis R. Rodriguez wrote:
 > +
 > +For details refer to Documentation/x86/pat.txt.
 > +
-> +===============================================================================
->  
+> +=======================================>  
 >    On Intel P6 family processors (Pentium Pro, Pentium II and later)
 >    the Memory Type Range Registers (MTRRs) may be used to control
 > diff --git a/Documentation/x86/pat.txt b/Documentation/x86/pat.txt
diff --git a/a/content_digest b/N1/content_digest
index cc03e25..e6405d5 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -11,7 +11,7 @@
   "Subject\0Re: [PATCH v4 2/6] x86: document WC MTRR effects on PAT / non-PAT pages\0"
 ]
 [
-  "Date\0Mon, 4 May 2015 14:23:03 +0200\0"
+  "Date\0Mon, 04 May 2015 12:23:03 +0000\0"
 ]
 [
   "To\0Luis R. Rodriguez <mcgrof\@do-not-panic.com>\0"
@@ -108,8 +108,7 @@
   "> +Richard Gooch <rgooch\@atnf.csiro.au> - 3 Jun 1999\n",
   "> +Luis R. Rodriguez <mcgrof\@do-not-panic.com> - April 9, 2015\n",
   "> +\n",
-  "> +===============================================================================\n",
-  "> +Phasing MTRR use\n",
+  "> +=======================================> +Phasing MTRR use\n",
   "\n",
   "\"Phasing out...\".\n",
   "\n",
@@ -121,8 +120,7 @@
   "> +\n",
   "> +For details refer to Documentation/x86/pat.txt.\n",
   "> +\n",
-  "> +===============================================================================\n",
-  ">  \n",
+  "> +=======================================>  \n",
   ">    On Intel P6 family processors (Pentium Pro, Pentium II and later)\n",
   ">    the Memory Type Range Registers (MTRRs) may be used to control\n",
   "> diff --git a/Documentation/x86/pat.txt b/Documentation/x86/pat.txt\n",
@@ -215,4 +213,4 @@
   "--"
 ]
 
-3cd4207bab5f878dfb77eee386e45cdf86ecb3dd49feff154acdabfae00ca324
+49f02e3bbbe0df61311b16eba3f0d37ad2ac9e1ec62525a2f8bf472006a57ace
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