From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 7/8] drm/i915: Use the CRC gpio for panel enable/disable Date: Wed, 6 May 2015 16:08:50 +0200 Message-ID: <20150506140850.GH30184@phenom.ffwll.local> References: <1430316005-16480-1-git-send-email-shobhit.kumar@intel.com> <1430316005-16480-8-git-send-email-shobhit.kumar@intel.com> <871titetqo.fsf@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <871titetqo.fsf@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jani Nikula Cc: linux-pwm , Samuel Ortiz , Alexandre Courbot , David Airlie , Shobhit Kumar , intel-gfx , linux-kernel , dri-devel , linux-gpio , Chih-Wei Huang , Povilas Staniulis , Thierry Reding , Daniel Vetter , Lee Jones , Linus Walleij List-Id: linux-gpio@vger.kernel.org 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bGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752616AbbEFOGg (ORCPT ); Wed, 6 May 2015 10:06:36 -0400 Received: from mail-wi0-f181.google.com ([209.85.212.181]:33055 "EHLO mail-wi0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751442AbbEFOGc (ORCPT ); Wed, 6 May 2015 10:06:32 -0400 Date: Wed, 6 May 2015 16:08:50 +0200 From: Daniel Vetter To: Jani Nikula Cc: Shobhit Kumar , intel-gfx , linux-kernel , linux-gpio , linux-pwm , dri-devel , Alexandre Courbot , Samuel Ortiz , David Airlie , Linus Walleij , Povilas Staniulis , Chih-Wei Huang , Thierry Reding , Daniel Vetter , Lee Jones Subject: Re: [Intel-gfx] [PATCH 7/8] drm/i915: Use the CRC gpio for panel enable/disable Message-ID: <20150506140850.GH30184@phenom.ffwll.local> Mail-Followup-To: Jani Nikula , Shobhit Kumar , intel-gfx , linux-kernel , linux-gpio , linux-pwm , dri-devel , Alexandre Courbot , Samuel Ortiz , David Airlie , Linus Walleij , Povilas Staniulis , Chih-Wei Huang , Thierry Reding , Daniel Vetter , Lee Jones References: <1430316005-16480-1-git-send-email-shobhit.kumar@intel.com> <1430316005-16480-8-git-send-email-shobhit.kumar@intel.com> <871titetqo.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <871titetqo.fsf@intel.com> X-Operating-System: Linux phenom 4.0.0-rc3+ User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 06, 2015 at 04:11:11PM +0300, Jani Nikula wrote: > On Wed, 29 Apr 2015, Shobhit Kumar wrote: > > The CRC (Crystal Cove) PMIC, controls the panel enable and disable > > signals for BYT for dsi panels. This is indicated in the VBT fields. Use > > that to initialize and use GPIO based control for these signals. > > > > v2: Use the newer gpiod interface(Alexandre) > > v3: Remove the redundant checks and unused code (Ville) > > > > CC: Samuel Ortiz > > Cc: Linus Walleij > > Cc: Alexandre Courbot > > Cc: Thierry Reding > > Signed-off-by: Shobhit Kumar > > --- > > drivers/gpu/drm/i915/intel_dsi.c | 32 ++++++++++++++++++++++++++++++-- > > drivers/gpu/drm/i915/intel_dsi.h | 6 ++++++ > > 2 files changed, 36 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c > > index 5196642..be55ffa 100644 > > --- a/drivers/gpu/drm/i915/intel_dsi.c > > +++ b/drivers/gpu/drm/i915/intel_dsi.c > > @@ -31,6 +31,7 @@ > > #include > > #include > > #include > > +#include > > #include "i915_drv.h" > > #include "intel_drv.h" > > #include "intel_dsi.h" > > @@ -415,6 +416,12 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder) > > > > DRM_DEBUG_KMS("\n"); > > > > + /* Panel Enable over CRC PMIC */ > > + if (intel_dsi->gpio_panel) > > + gpiod_set_value_cansleep(intel_dsi->gpio_panel, 1); > > + > > + msleep(intel_dsi->panel_on_delay); > > + > > /* Disable DPOunit clock gating, can stall pipe > > * and we need DPLL REFA always enabled */ > > tmp = I915_READ(DPLL(pipe)); > > @@ -432,8 +439,6 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder) > > /* put device in ready state */ > > intel_dsi_device_ready(encoder); > > > > - msleep(intel_dsi->panel_on_delay); > > - > > drm_panel_prepare(intel_dsi->panel); > > > > for_each_dsi_port(port, intel_dsi->ports) > > @@ -576,6 +581,10 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder) > > > > msleep(intel_dsi->panel_off_delay); > > msleep(intel_dsi->panel_pwr_cycle_delay); > > + > > + /* Panel Disable over CRC PMIC */ > > + if (intel_dsi->gpio_panel) > > + gpiod_set_value_cansleep(intel_dsi->gpio_panel, 0); > > } > > > > static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, > > @@ -955,6 +964,11 @@ static void intel_dsi_encoder_destroy(struct drm_encoder *encoder) > > /* XXX: Logically this call belongs in the panel driver. */ > > drm_panel_remove(intel_dsi->panel); > > } > > + > > + /* dispose of the gpios */ > > + if (intel_dsi->gpio_panel) > > + gpiod_put(intel_dsi->gpio_panel); > > + > > intel_encoder_destroy(encoder); > > } > > > > @@ -1071,6 +1085,20 @@ void intel_dsi_init(struct drm_device *dev) > > goto err; > > } > > > > + /* > > + * In case of BYT with CRC PMIC, we need to use GPIO for > > + * Panel control. > > + */ > > + if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { > > + intel_dsi->gpio_panel = > > + gpiod_get(dev->dev, "panel", GPIOD_OUT_HIGH); > > + > > + if (IS_ERR(intel_dsi->gpio_panel)) { > > + DRM_ERROR("Failed to own gpio for panel control\n"); > > + intel_dsi->gpio_panel = NULL; > > + } > > + } > > + > > intel_encoder->type = INTEL_OUTPUT_DSI; > > intel_encoder->cloneable = 0; > > drm_connector_init(dev, connector, &intel_dsi_connector_funcs, > > diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h > > index 2784ac4..bf1bade 100644 > > --- a/drivers/gpu/drm/i915/intel_dsi.h > > +++ b/drivers/gpu/drm/i915/intel_dsi.h > > @@ -29,6 +29,9 @@ > > #include > > #include "intel_drv.h" > > > > +#define PPS_BLC_PMIC 0 > > +#define PPS_BLC_SOC 1 > > Since these values are defined in the VBT, perhaps these should be in > intel_bios.h. Up to you, I'm fine either way. > > Reviewed-by: Jani Nikula Yeah if they're vbt it's better to keep all that together. Maybe we'll eventually get a bright future where vbt documentation is solid, and then it's good to have it all in one place. -Daniel > > > > + > > /* Dual Link support */ > > #define DSI_DUAL_LINK_NONE 0 > > #define DSI_DUAL_LINK_FRONT_BACK 1 > > @@ -42,6 +45,9 @@ struct intel_dsi { > > struct drm_panel *panel; > > struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; > > > > + /* GPIO Desc for CRC based Panel control */ > > + struct gpio_desc *gpio_panel; > > + > > struct intel_connector *attached_connector; > > > > /* bit mask of ports being driven */ > > -- > > 2.1.0 > > > > -- > Jani Nikula, Intel Open Source Technology Center > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch